Cirrus Logic CS49DV8C - Manual (Page 14)

14 Copyright 2008 Cirrus Logic, Inc. DS868PP2
CS49DV8C Data Sheet
32-bit Audio DSP Family
5.9 Switching Characteristics — Serial Control Port - SPI Slave Mode
.
Figure 3. Serial Control Port - SPI Slave Mode Timing
Parameter Symbol Min Typical Max Units
SCP_CLK frequency
1
1. The specification f
spisck
indicates the maximum speed of the hardware. The system designer should be aware that the
actual maximum speed of the communication port may be limited by the firmware application. Flow control using the
SCP_BSY pin should be implemented to prevent overflow of the input data buffer.At boot the maximum speed is
Fxtal/3.
f
spisck
- 25 MHz
SCP_CS falling to SCP_CLK rising t
spicss
24 - ns
SCP_CLK low time t
spickl
20 - ns
SCP_CLK high time t
spickh
20 - ns
Setup time SCP_MOSI input t
spidsu
5 - ns
Hold time SCP_MOSI input t
spidh
5 - ns
SCP_CLK low to SCP_MISO output valid t
spidov
- 11 ns
SCP_CLK falling to SCP_IRQ rising t
spiirqh
- 20 ns
SCP_CS rising to SCP_IRQ falling t
spiirql
0 ns
SCP_CLK low to SCP_CS rising t
spicsh
24 - ns
SCP_CS rising to SCP_MISO output high-Z t
spicsdz
- 20 ns
SCP_CLK rising to SCP_BSY falling t
spicbsyl
- 3
*
DCLKP+20 ns
SCP_BSY
SCP_CS
SCP_CLK
SCP_MOSI
SCP_MISO
SCP_IRQ
0 1 2 6 7 0 5 6 7
t
spicss
t
spickl
t
spickh
t
spidsu
t
spidh t
spidov
A6 A5 A0 R/W MSB LSB
MSB LSB
t
spicsh
t
spibsyl
t
spiirql
t
spiirqh
f
spisck
t
spicsdz