Cirrus Logic CDB42L52 User Manual
Cdb42l52, Evaluation board for cs42l52, Features
Copyright
© Cirrus Logic, Inc. 2006
(All Rights Reserved)
Evaluation Board for CS42L52
Features
Stereo Analog Inputs
– 4 Stereo Audio Jack Inputs, 2 of which can
be Differential Microphone Inputs
– Channel Mixer
MUX’d Analog Output and Speaker Outputs
– Headphone/Line Out Jack
– Stereo Headphone Jack
– Stereo Speaker Outputs w/Banana Jacks
8- to 96-kHz S/PDIF Interface
– CS8416 Digital Audio Receiver
– CS8406 Digital Audio Transmitter
I/O Stake Headers
– External Control Port Accessibility
– External DSP Serial Audio I/O Accessibility
Independent, Regulated Power Supplies
1.65 V to 3.3 V Logic Interface
FlexGUI S/W Control - Windows
®
Compatible
– Pre-Defined & User-Configurable Scripts
Description
Using the CDB42L52 evaluation board is an ideal way
to evaluate the CS42L52 CODEC. Use of the board re-
quires an analog/digital signal source, an analyzer and
power supplies. A Windows
PC-compatible computer is
also needed in order to configure the CS42L52 and the
board functionality.
System timing can be provided by the CS8416, by the
CS42L52 with supplied master clock, or via an I/O stake
header with a DSP connected.
1/8th inch audio jacks are provided for the CS42L52 an-
alog inputs and HP/Line outputs. Speaker driver
outputs are via Banana jacks. Digital data I/O connec-
tions are via RCA phono or optical connectors to the
CS8416 and CS8406 (S/PDIF Rx and Tx).
The Windows-based software GUI provided makes
configuring the CDB42L52 easy. The software commu-
nicates through the PC’s USB to configure board and
FPGA registers so that all features of the CS42L52 can
be evaluated. The evaluation board may also be con-
figured to accept external timing and data signals for
operation in a user application during system develop-
ment.
ORDERING INFORMATION
CDB42L52
Evaluation Board
Analog Output
(Line + Headphone)
Analog Input
(Line + MIC)
Software Mode
Control Port
CS42L52
S/PDIF Input
(CS8416)
S/PDIF Output
(CS8406)
Clocks/Data
Header
I²C Header
FPGA
Oscillator
(socket)
Reset
MCLK
Reset
Reset
MCLK
Reset
Speaker Outputs
Frequency
Synthesizer PLL
Clk/Data SRC
DECEMBER '06
DS680DB1
CDB42L52