A.2.3 advanced chipset features – Acnodes FPC 8084 User Manual
Page 48

FPC 8084 User s Manual
A.2.3
Advanced Chipset Features
Since the features in this section are related to the chipset on the
CPU board and are completely optimized, changing the default
settings in this setup table are not recommended unless the user is
well oriented with the chipset features.
Phoe nix – Award BIOS CMOS Setup Utility
Ad vanced Chipset Features
DRAM Timing By SPD
Enabled
Item Help
X DRAM Clock
Host CLK
X SDRAM Cycle Length
3
Menu Level f
X Bank Interleave
Disabled
Memory Hole
Disabled
P2C/C2P Concurrency
Enabled
System BIOS Cacheable
Disabled
Video RAM Cacheable
Disabled
Frame Buffer Size
16MAGP
Aperture Size
64M
AGP-4X Mode
Enabled
AGP Driving Control
AutoAGP
Driving Value
DA
OnChip USB
Enabled
USB Keyboard Support
Disabled
OnChip Sound
Auto
OnChip Modem
Disabled
CPU to PCI Write Buffer
Enabled
PCI Dynamic Bursting
Enabled
PCI Master 0 WS Write
Enabled
PCI Delay Transaction
Disabled
PCI#2 Access #1 Retry
Enabled
AGP Master 1 WS Write
Disabled
AGP Master 1 WS Read
Disabled
ЗИЖЕ : Move
Enter: Select
+/-/PU/PD: Value
F10: Save
ESC: Exit F 1:
General Help
F5: Previous Values F 6: F ail-Safe Defaults F7 : Optimized Defaults
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