Campbell Scientific SDM-AO4A Four Channel Analog Output Module - Manual (Page 12)

SDM-AO4A Four Channel Analog Output
SDMAO4AOption: The SDMAO4AOption parameter is used to set the
operating mode for the SDMAO4A.
Option Code Description
0 Power down
1 5V synchronous
2 5V sequential
3 10V synchronous
4 10V sequential
In the synchronous mode, all channels are set at the same time. This mode is
slower since for large changes in voltage it may take multiple charging cycles
to arrive at the final voltage. The steps occur at 5 ms intervals, thus, for a 10V
step it may take up to three charge cycles (or 15 ms) to settle to the 16-bit
level.
In sequential mode, the channels are set sequentially. The output signal can
take from 600 usecs to 1 ms (worst case) to settle to 16-bit resolution with a
10V step change. The four outputs then update 1 ms apart.
7.1.2 SDMSpeed Instruction
The SDMSpeed instruction is used to change the bit period that the datalogger
uses to clock the SDM data. Slowing down the clock rate may be necessary
when long cable lengths are used to connect the datalogger and SDM devices.
The syntax of this instruction is as follows:
SDMSpeed ( BitPeriod )
The BitPeriod argument can be an integer or a variable. If the SDMSpeed
instruction is not in the program, a default bit period is used. If 0 is used for
the argument, the minimum allowable bit period is used. Table 3 shows the
default, minimum allowable, and maximum bit period for each of our CRBasic
dataloggers.
TABLE 3. Bit Period Values
Datalogger Default
Bit Period Minimum Allowable
Bit Period Maximum
Bit Period
CR800, CR850 26.04 μsec 8.68 μsec 2.2 msec
CR1000 26.04 μsec 8.68 μsec 2.2 msec
CR3000 26.04 μsec 8.68 μsec 2.2 msec
CR5000 30 μsec 8 μsec 3 msec
The equation used to calculate the bit rate depends on the datalogger used.
The datalogger will round down to the next faster bit rate.
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