Rainbow Electronics MAX1531 User Manual
Page 29
MAX1530/MAX1531
Multiple-Output Power-Supply Controllers for
LCD Monitors
______________________________________________________________________________________
29
Flying Capacitors
Increasing the flying capacitor value lowers the effec-
tive source impedance and increases the output cur-
rent capability. Increasing the capacitance indefinitely
has a negligible effect on output current capability
because the internal switch resistance and the diode
impedance place a lower limit on the source imped-
ance. A 0.1µF ceramic capacitor works well in most
low-current applications. The voltage rating for a given
flying capacitor (CX) must exceed the following:
V
CX
> N x V
IN
where N is the stage number in which the flying capaci-
tor appears, and V
IN
is the input voltage of the step-
down regulator.
Charge-Pump Output Capacitors
Increasing the output capacitance or decreasing the
ESR reduces the charge pump output ripple voltage
and the peak-to-peak transient voltage. With ceramic
capacitors, the output voltage ripple is dominated by
the capacitance value. Use the following equation to
approximate the required capacitor value:
where V
RIPPLE
is the peak-to-peak value of the output
ripple.
Charge-Pump Rectifier Diodes
Use low-cost silicon switching diodes with a current rat-
ing equal to or greater than 2 times the average
charge-pump input current. If it helps avoid an extra
stage, some or all of the diodes can be replaced with
Schottky diodes with an equivalent current rating.
Linear Regulator Controllers
Output Voltage Selection
Adjust the positive linear regulator (LR1 to LR4) output
voltages by connecting a resistive voltage-divider from
the output to AGND with the center tap connected to
FBL_ (Figure 1). Select the lower resistor of the divider
in the 10k
Ω to 30kΩ range. Calculate the upper resistor
with the following equation:
where V
FBL
_ is 1.238V (typ).
Adjust the negative linear regulator (LR5) output volt-
age by connecting a resistive voltage-divider from
V
GOFF
to VL with the center tap connected to FBL5
(Figure 1). Select R29 in the 10k
Ω to 30kΩ range.
Calculate R28 with the following equation:
where V
FBL5
= 125mV and V
L
= 5.0V.
Pass Transistor Selection
The pass transistor must meet specifications for DC
current gain (h
FE
), collector-emitter saturation voltage,
and power dissipation. The transistor’s current gain lim-
its the guaranteed maximum output current to:
where I
DRV
is the minimum guaranteed base drive cur-
rent, V
BE
is the base-emitter voltage of the pass transis-
tor, and R
BE
is the pullup resistor connected between
the transistor’s base and emitter. Furthermore, the tran-
sistor’s current gain increases the linear regulator’s DC
loop gain (see the Stability Requirements section),
which may destabilize the output. Therefore, transistors
with current gain over 300 at the maximum output cur-
rent can be difficult to stabilize and are not recom-
mended unless the high gain is needed to meet the
load current requirements.
The transistor’s saturation voltage at the maximum out-
put current determines the minimum input-to-output
voltage differential that the linear regulator supports.
Also, the package’s power dissipation limits the usable
maximum input-to-output voltage differential. The maxi-
mum power dissipation capability of the transistor’s
package and mounting must exceed the actual power
dissipation in the device. The power dissipation equals
the maximum load current (I
LOAD(MAX)
) times the maxi-
mum input-to-output voltage differential:
where V
LRIN(MAX)
is the maximum input voltage of the
linear regulator, and V
LROUT
is the output voltage of the
linear regulator.
Output Voltage Ripple
Ideally, the output voltage of a linear regulator should
not contain any ripple. In the MAX1530/MAX1531, the
step-down regulator’s switching noise can couple to
the linear regulators, creating output voltage ripple.
Following the PC board layout guidelines in the PC
Board Layout and Grounding section can significantly
reduce noise coupling. If there is still an unacceptable
P I
V
V
LOAD MAX
LRIN MAX
LROUT
=
×
−
(
)
(
)
(
)
I
I
V
R
h
LOAD MAX
DRV
BE
BE
FE
(
)
=
−
×
R
R
V
V
V
V
FBL
GOFF
L
FBL
28
29
5
5
=
×
−
−
(
)
[
]
) /(
R
R
V
V
UPPER
LOWER
OUT
FBL
=
×
(
)
−
[
]
_
_
/
1
C
I
f
V
OUT
LOAD
OSC RIPPLE
≥
2