Rainbow Electronics MAX1748 - Manual (Page 13)

MAX1748
Triple-Output TFT LCD DC-DC Converter
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voltage by connecting a voltage-divider from the output
(V
NEG ) to FBN to REF. Select R4 and R6 in the 50k Ω to
100k Ω range. Higher resistor values improve efficiency
at low output current but increase output voltage error
due to the feedback input bias current. Calculate the
remaining resistors with the following equations:
R3 = R4 [(V POS / V REF ) - 1]
R5 = R6 (V NEG / V REF )
where V REF = 1.25V. V POS may range from V SUPP to
40V, and V NEG may range from 0 to -40V.
Flying Capacitor
Increasing the flying capacitor’s value reduces the out-
put current capability. Above a certain point, increasing
the capacitance has a negligible effect because the
output current capability becomes dominated by the
internal switch resistance and the diode impedance.
Start with 0.1µF ceramic capacitors. Smaller values
may be used for low-current applications.
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the
ESR reduces the output ripple voltage and the peak-to-
peak transient voltage. Use the following equation to
approximate the required capacitor value:
C OUT
≥ [I
OUT / (500kHz ✕ V RIPPLE )]
Charge-Pump Input Capacitor
Use a bypass capacitor with a value equal to or greater
than the flying capacitor. Place the capacitor as close
to the IC as possible. Connect directly to PGND.
Rectifier Diode
Use Schottky diodes with a current rating equal to or
greater than 4 times the average output current, and a
voltage rating at least 1.5 times V
SUPP for the positive
charge pump and V SUPN for the negative charge pump.
PC Board Layout and Grounding
Careful printed circuit layout is extremely important to
minimize ground bounce and noise. First, place the
main boost converter output diode and output capacitor
less than 0.2in (5mm) from the LX and PGND pins with
wide traces and no vias. Then place 0.1µF ceramic
bypass capacitors near the charge-pump input pins
(SUPP and SUPN) to the PGND pin. Keep the charge-
pump circuitry as close to the IC as possible, using
wide traces and avoiding vias when possible. Locate all
feedback resistive dividers as close to their respective
feedback pins as possible. The PC board should fea-
ture separate GND and PGND areas connected at only
one point under the IC. To maximize output power and
efficiency and to minimize output power ripple voltage,
use extra wide power ground traces and solder the IC’s
power ground pin directly to it. Avoid having sensitive
traces near the switching nodes and high-current lines.
Refer to the MAX1748 evaluation kit for an example of
proper board layout.
Applications Information
Boost Converter Using a
Cascoded MOSFET
For applications that require output voltages greater
than 13V, cascode an external N-channel MOSFET
(Figure 4). Place the MOSFET as close to the LX pin as
possible. Connect the gate to the input voltage (V
IN )
and the source to LX.
MOSFET Selection
Choose a MOSFET with an on-resistance (R DS(ON) )
lower than the internal N-channel MOSFET. Lower
R
DS(ON) will improve efficiency. The external N-channel
MOSFET must have a drain-voltage rating higher than
the main output voltage (V
MAIN ).
Chip Information
TRANSISTOR COUNT: 2846