Table 4. software-controlled power modes, Power-down sequencing – Rainbow Electronics MAX1081 User Manual
Page 16

MAX1080/MAX1081
Hardware Power-Down
Pulling SHDN low places the converter in hardware
power-down. Unlike software power-down mode, the
conversion is terminated immediately. When returning
to normal operation from SHDN with an external refer-
ence, the MAX1080/MAX1081 can be considered fully
powered up within 2µs of actively pulling SHDN high.
When using the internal reference, the conversion
should be initiated only after the reference has settled;
its recovery time is dependent on the external bypass
capacitors and shutdown duration.
Power-Down Sequencing
The MAX1080/MAX1081 automatic power-down modes
can save considerable power when operating at less
than maximum sample rates. Figures 10 and 11 show
the average supply current as a function of the sam-
pling rate.
Using Full Power-Down Mode
Full power-down mode (FULLPD) achieves the lowest
power consumption, up to 1000 conversions per chan-
nel per second. Figure 10a shows the MAX1081’s
power consumption for one- or eight-channel conver-
sions utilizing full power-down mode (PD1 = PD0 = 0),
with the internal reference and the maximum clock
speed. A 0.01µF bypass capacitor at REFADJ forms an
RC filter with the internal 17k
Ω reference resistor, with a
200µs time constant. To achieve full 10-bit accuracy,
seven time constants or 1.4ms are required after
power-up if the bypass capacitor is fully discharged
between conversions. Waiting this 1.4ms duration in
300ksps/400ksps, Single-Supply, Low-Power,
8-Channel, Serial 10-Bit ADCs with Internal Reference
16
______________________________________________________________________________________
PD1/PD0
MODE
CONVERTING
(mA)
AFTER
CONVERSION
INPUT COMPARATOR
REFERENCE
00
Full Power-Down
(FULLPD)
2.5
2µA
Off
Off
01
Fast Power-Down
(FASTPD)
2.5
0.9mA
Reduced Power
On
10
Reduced-Power
Mode (REDP)
2.5
1.3mA
Reduced Power
On
11
Normal Operating
2.5
2.0mA
Full Power
On
CIRCUIT SECTIONS*
TOTAL SUPPLY CURRENT
Table 4. Software-Controlled Power Modes
*Circuit operation between conversions; during conversion all circuits are fully powered up.
SCLK
DIN
DOUT
SSTRB
t
CSS
t
CH
t
CSO
t
CL
t
DH
t
DS
t
DOE
t
STE
t
CSW
t
CP
t
CSH
t
CS1
t
STD
t
DOD
t
DOV
t
DOH
t
STV
t
STH
CS
Figure 7. Detailed Serial-Interface Timing