Rainbow Electronics DS1543 User Manual

Page 7

DS1543

7 of 17

When the RTC register values match alarm register settings, the Alarm Flag bit (AF) is set to a 1. If
Alarm Flag Enable (AE) is also set to a 1, the alarm condition activates the

IRQ

/FT pin. The

IRQ

/FT

signal is cleared by a read or write to the Flags register (Address 1FF0h) as shown in Figure 2. The

IRQ

/FT signal may be cleared by having the address stable for as short as 15 ns and either

active, but is not guaranteed to be cleared unless t

is fulfilled. The alarm flag is also cleared by a read

or write to the Flags register, but the flag will not change states until the end of the read/write cycle and
the

IRQ

/FT signal has been cleared.

CLEARING IRQ WAVEFORMS Figure 2

CLEARING IRQ WAVEFORMS Figure 3

The

IRQ

/FT pin can also be activated in the battery-backed mode. The

IRQ

/FT will go low if an alarm

occurs and both ABE and AE are set. The ABE and AE bits are cleared during the power-up transition,
however an alarm generated during power-up will set AF. Therefore the AF bit can be read after system
power-up to determine if an alarm was generated during the power-up sequence. Figure 4 illustrates
alarm timing during the battery backup mode and power-up states.