Rainbow Electronics DS3231 - Manual (Page 6)

DS3231
Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
6 _____________________________________________________________________
Data Transfer on I 2 C Serial Bus
SDA
SCL
t HD:STA
t LOW
t HIGH
t R t F
t BUF
t HD:DAT
t SU:DAT REPEATED
START
t SU:STA
t HD:STA
t SU:STO
t SP
STOP START
Note 1: Limits at -40°C are guaranteed by design and not production tested.
Note 2: All voltages are referenced to ground.
Note 3: I
CCA —SCL clocking at max frequency = 400kHz.
Note 4: Current is the averaged input current, which includes the temperature conversion current.
Note 5: The RST pin has an internal 50kΩ (nominal) pullup resistor to V
CC .
Note 6: After this period, the first clock pulse is generated.
Note 7: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
IH(MIN) of the SCL signal)
to bridge the undefined region of the falling edge of SCL.
Note 8: The maximum t HD:DAT needs only to be met if the device does not stretch the low period (t LOW ) of the SCL signal.
Note 9: A fast-mode device can be used in a standard-mode system, but the requirement t SU:DAT ≥ 250ns must then be met. This
is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the
low period of the SCL signal, it must output the next data bit to the SDA line t
R(MAX) + t SU:DAT = 1000 + 250 = 1250ns
before the SCL line is released.
Note 10: C B —total capacitance of one bus line in pF.
Note 11: The parameter t OSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of
0.0V ≤ V CC ≤ V CC(MAX) and 2.3V ≤ V BAT ≤ 3.4V.
Note 12: This delay applies only if the oscillator is enabled and running. If the EOSC bit is a 1, the startup time of the oscillator is
added to this delay.