Ds1805 addressable digital potentiometer, Ac electrical characteristics – Rainbow Electronics DS1805 User Manual

Page 4

DS1805

Addressable Digital Potentiometer

_____________________________________________________________________

Note 1:

All voltages are referenced to ground.

Note 2:

Address inputs A0, A1, and A2 should be connected to either V

or GND, depending on the desired address selections.

Note 3:

I/O pins of fast mode devices must not obstruct the SDA and SCL lines if V

is switched off.

Note 4:

specified with SDA = SCL = V

= 5.0V.

Note 5:

Valid at +25

°C only.

Note 6:

Absolute linearity is used to determine wiper voltage versus expected voltage as determined by wiper position.

Note 7:

Relative linearity is used to determine the change in voltage between successive tap positions.

Note 8:

-3dB cutoff frequency characteristics for the DS1805 depend on potentiometer total resistance: DS1805-010, 1MHz;
DS1805-50, 200kHz; DS1805-100, 100kHz.

Note 9:

A fast mode device can be used in a standard mode system, but the requirement t

SU:DAT

> 250ns must then be met. This

will automatically be the case if the device does not stretch the low period of the SCL signal. If such a device does stretch
the LOW period of the SCL signal, it must output the next data bit to the SDA line t

RMAX

+ t

SU:DAT

= 1000ns + 250ns =

1250ns before the SCL line is released.

Note 10: After this period, the first clock pulse is generated.
Note 11: The maximum t

HD:DAT

has only to be met if the device does not stretch the low period (t

LOW

) of the SCL signal.

Note 12: A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V

IHMIN

of the SCL signal)

in order to bridge the undefined region of the falling edge of SCL.

Note 13: C

—total capacitance of one bus line in picofarads, timing referenced to (0.9)(V

) and (0.1)(V

AC ELECTRICAL CHARACTERISTICS

= 2.7V to 5.5V, T

= -40°C to +85°C)