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Electrical characteristics (continued) – Rainbow Electronics MAX5074 User Manual

Page 3

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MAX5074

Power IC with Integrated MOSFETs for Isolated IEEE

802.3af PD and Telecom Power-Supply Applications

_______________________________________________________________________________________

3

ELECTRICAL CHARACTERISTICS (continued)

(V

HVIN

= 12V, C

INBIAS

= 1µF, C

REGOUT

= 2.2µF, R

RTCT

= 25k

Ω, C

RTCT

= 100pF, C

BST

= 0.22µF, V

CSS

= V

CS

= 0V, V

RAMP

= V

UVLO

= 3V,

T

A

= T

J

= -40°C to +125°C, unless otherwise noted. Typical values are at T

A

= +25°C, unless otherwise noted.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

REGOUT LDO (REGOUT)

INBIAS floating, V

HVIN

= 11V to 76V

8.3

9.2

REGOUT Voltage Set Point

V

REGOUT

V

INBIAS

= V

HVIN

= 11V to 76V

9.5

11.0

V

INBIAS floating, V

HVIN

= 15V, I

REGOUT

= 0

to 30mA

0.25

REGOUT Load Regulation

V

INBIAS

= V

HVIN

= 15V, I

REGOUT

= 0 to

30mA

0.25

V

INBIAS floating, I

REGOUT

= 30mA

1.25

REGOUT Dropout Voltage

V

INBIAS

= V

HVIN

, I

REGOUT

= 30mA

1.25

V

REGOUT Undervoltage Lockout
Threshold

REGOUT rising

6.6

7.4

V

REGOUT Undervoltage Lockout
Threshold Hysteresis

REGOUT falling

0.7

V

SOFT-START (CSS)

Soft-Start Current

I

CSS

33

µA

INTEGRATING FAULT PROTECTION (FLTINT)

FLTINT Source Current

I

FLTINT

80

µA

FLTINT Trip Point

FLTINT rising

2.7

V

FLTINT Hysteresis

0.8

V

INTERNAL POWER MOSFETs (See Figure 1, QH and QL)

On-Resistance

R

DS(ON)

V

DRVIN

= V

BST

= 9V,

V

XFRMRH

= V

SRC

= 0V, I

DS

= 50mA

0.4

0.8

Off-State Leakage Current

-5

+5

µA

Total Gate Charge Per FET

15

nC

HIGH-SIDE DRIVER

Low-to-High Delay

Driver delay until FET V

GS

reaches 0.9 x

(V

BST

- V

XFRMRH

) and is fully on

80

ns

High-to-Low Delay

Driver delay until FET V

GS

reaches 0.1 x

(V

BST

- V

XFRMRH

) and is fully off

40

ns

Driver Output Voltage

BST to XFRMRH with high side on

8

V

LOW-SIDE DRIVER

Low-to-High Delay

Driver delay until FET V

GS

reaches 0.9 x

V

DRVIN

and is fully on

80

ns

High-to-Low Delay

Driver delay until FET V

GS

reaches 0.1 x

V

DRVIN

and is fully off

40

ns

CURRENT-LIMIT COMPARATOR (CS)

Current-Limit Threshold Voltage

V

ILIM

140

156

172

mV

Current-Limit Input Bias Current

I

BILIM

0 < V

CS

< 0.3V

-2

+2

µA