Rainbow Electronics MAX5550 - Manual (Page 3)

MAX5550
Dual, 10-Bit, Programmable, 30mA
High-Output-Current DAC
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ELECTRICAL CHARACTERISTICS (continued)
(V DD = +2.7V to +5.25V, GND = 0, V REFIN = +1.25V, internal reference, R FSADJ_ = 20k Ω; compliance voltage = (V
DD - 0.6V),
V SCLK/SCL = 0, T A = -40°C to +85°C, unless otherwise noted. Typical values are at V DD = +3.0V and T A = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Digital-to-Analog Glitch Impulse 40 nVs
DAC-to-DAC Current Matching 2 %
V DD = +3V 400
Wake-Up Time
V DD = +5V 10
µs
POWER SUPPLIES
Supply Voltage V DD +2.70 +5.25 V
Supply Current I
DD
V
DD
= +5.25V, no load 3 6 mA
Shutdown Current 1.2 µA
LOGIC AND CONTROL INPUTS
+2.7V ≤ V
DD
≤ +3.4V
0.7 x
V DD Input High Voltage (Note 5) V
IH
+3.4V < V DD
≤ +5.25V 2.4
V
Input Low Voltage V IL (Note 5) 0.8 V
Input Hysteresis V HYS
0.1 x
V DD
V
Input Capacitance C IN 10 pF
Input Leakage Current I IN ±1 µA
Output Low Voltage V OL I SINK = 3mA 0.6 V
Output High Voltage V OH I SOURCE = 2mA
V DD -
0.5
V
I 2 C TIMING CHARACTERISTICS (Figure 2)
SCL Clock Frequency f SCL 400 kHz
Setup Time for START Condition t SU:STA 600 ns
Hold Time for START Condition t HD:STA 600 ns
SCL Pulse-Width Low t LOW 130 ns
SCL Pulse-Width High t HIGH 600 ns
Data Setup Time t
SU:DAT
100 ns
Data Hold Time t HD:DAT 0 70 ns
SCL Rise Time t RCL
20 + 0.1
x C B
300 ns
SCL Fall Time t FCL
20 + 0.1
x C B
300 ns
SDA Rise Time t RDA
20 + 0.1
x C B
300 ns
SDA Fall Time t FDA
20 + 0.1
x C B
300 ns