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Rainbow Electronics MAX9938 User Manual

Page 7

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MAX9938

1µA, 4-Bump UCSP/SOT23,

Precision Current-Sense Amplifier

_______________________________________________________________________________________

7

OUT Swing vs. V

RS+

and V

SENSE

The MAX9938 is unique since the supply voltage is the
input common-mode voltage (the average voltage at
RS+ and RS-). There is no separate V

CC

supply voltage

pin. Therefore, the OUT voltage swing is limited by the
minimum voltage at RS+.

V

OUT

(max) = V

RS+

(min) - V

SENSE

(max) - V

OH

and

V

SENSE

full scale should be less than V

OUT

/gain at the

minimum RS+ voltage. For best performance with a
3.6V supply voltage, select R

SENSE

to provide approxi-

mately 120mV (gain of 25V/V), 60mV (gain of 50V/V), or
30mV (gain of 100V/V) of sense voltage for the full-
scale current in each application. These can be
increased by use of a higher minimum input voltage.

Accuracy

In the linear region (V

OUT

< V

OUT(max)

), there are two

components to accuracy: input offset voltage (V

OS

) and

gain error (GE). For the MAX9938, V

OS

= 500μV (max)

and gain error is 0.5% (max). Use the linear equation:

V

OUT

= (gain ± GE) x V

SENSE

± (gain x V

OS

)

to calculate total error. A high R

SENSE

value allows lower

currents to be measured more accurately because off-
sets are less significant when the sense voltage is larger.

Efficiency and Power Dissipation

At high current levels, the I

2

R losses in R

SENSE

can be

significant. Take this into consideration when choosing
the resistor value and its power dissipation (wattage)
rating. Also, the sense resistor’s value might drift if it is
allowed to heat up excessively. The precision V

OS

of

the MAX9938 allows the use of small sense resistors to
reduce power dissipation and reduce hot spots.

Kelvin Connections

Because of the high currents that flow through R

SENSE

,

take care to eliminate parasitic trace resistance from
causing errors in the sense voltage. Either use a four-
terminal current-sense resistor or use Kelvin (force and
sense) PCB layout techniques.

Optional Output Filter Capacitor

When designing a system that uses a sample-and-hold
stage in the ADC, the sampling capacitor momentarily
loads OUT and causes a drop in the output voltage. If
sampling time is very short (less than a microsecond),
consider using a ceramic capacitor across OUT and
GND to hold V

OUT

constant during sampling. This also

decreases the small-signal bandwidth of the current-
sense amplifier and reduces noise at OUT.

R

V

G I

SENSE

OUT

LOAD

=

×

(max)

(max)