Nuc140 series data sheet – Rainbow Electronics NUC140 User Manual

Page 8

NUC140 Series DATA SHEET

Publication Release Date: May 31, 2010

- 8 -

Revision V1.02

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Two sets of I

C device.

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Master/Slave up to 1Mbit/s ( Fast-mode Plus )

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Bidirectional data transfer between masters and slaves

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Multi-master bus (no central master).

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Arbitration between simultaneously transmitting masters without corruption of serial data on
the bus

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Serial clock synchronization allows devices with different bit rates to communicate via one
serial bus.

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Serial clock synchronization can be used as a handshake mechanism to suspend and resume
serial transfer.

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Programmable clocks allow versatile rate control.

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I2C-bus controllers support multiple address recognition ( two slave address with mask option)

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Interface with external audio CODEC

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Operate as either master or slave mode

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Capable of handling 8, 16, and 32 bit word sizes

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Mono and stereo audio data supported

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S and MSB justified data format supported

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Two 8 word FIFO data buffers are provided, one for transmit and one for receive

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Generates interrupt requests when buffer levels cross a programmable boundary

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Support two DMA requests, one for transmit and one for receive

• CAN

2.0

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CAN 2.0B protocol compatible device

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Support 11-bit identifier as well as 29-bit identifier

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Bit rates up to 1Mbits/s

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NRZ bit Coding/ Encoding

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Error Detection & Status Report

Bit error, Form error, Stuffing error, 15-bit CRC detection, and Acknowledge error
Interrupt

Each CAN-bus error, and Transmission/Receive Done.

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Bit Timing Synchronization

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Acceptance filter extension

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Sleep mode wake up

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USB 2.0 Full-Speed Device

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One set of USB 2.0 FS Device 12Mbps

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On-chip USB Transceiver.

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Provide 1 interrupt source with 4 interrupt events.

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Support Control, Bulk In/Out, Interrupt and Isochronous transfers.

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Auto suspend function when no bus signaling for 3 ms.

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Provide 6 programmable endpoints.

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Include 512 Bytes internal SRAM as USB buffer.

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Provide remote wakeup capability.

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Support PDMA mode