Serial clock (sclk), External sclk mode, Internal sclk mode – Rainbow Electronics MAX5559 User Manual
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MAX5556–MAX5559
Low-Cost Stereo Audio DACs
10
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Serial Clock (SCLK)
SCLK strobes the individual data bits at SDATA into the
DAC. The MAX5556–MAX5559 operate in one of two
modes: internal serial clock mode or external serial
clock mode.
External SCLK Mode
The MAX5556–MAX5559 operate in external serial clock
mode when SCLK activity is detected. All four devices
return to internal serial clock mode if no SCLK signal is
detected for one LRCLK period. Figure 8 details the
external serial clock mode timing parameters.
Internal SCLK Mode
The MAX5556–MAX5559 transition from external serial
clock mode to internal serial clock mode if no SCLK
signal is detected for one LRCLK period. In internal
clock mode, SCLK is derived from and is synchronous
with MCLK and LRCLK (operation in internal clock
mode is identical to an external clock mode when
LRCLK is synchronized with MCLK). Figure 9 details
the internal serial clock mode timing parameters. Figure
10 details the generation of the internal clock.
INTERNAL SERIAL CLOCK MODE
EXTERNAL SERIAL CLOCK MODE
• RIGHT-JUSTIFIED, 16-BIT DATA
• DATA VALID ON RISING EDGE OF SCLK
• SCLK MUST HAVE AT LEAST 32 CYCLES PER LRCLK PERIOD
• RIGHT-JUSTIFIED, 16-BIT DATA
• INTERNAL SCLK = 32 x f
S
IF MCLK / LRCLK = 256 OR 512
• INTERNAL SCLK = 48 x f
S
IF MCLK / LRCLK = 384
8
9
7
6
5
4
3
2
1
0
LRCLK
SCLK
SDATA
DATA DIRECTED TO OUTL
DATA DIRECTED TO OUTR
8
9
7
6
5
4
3
2
1
0
LSB
MSB
LSB
MSB
15
14
13
12
11
10
15
14
13
12
11
10
Figure 6. MAX5558 Data Format Timing
INTERNAL SERIAL CLOCK MODE
EXTERNAL SERIAL CLOCK MODE
• RIGHT-JUSTIFIED, 18-BIT DATA
• DATA VALID ON RISING EDGE OF SCLK
• SCLK MUST HAVE AT LEAST 36 CYCLES PER LRCLK PERIOD
• RIGHT-JUSTIFIED, 18-BIT DATA
• INTERNAL SCLK = 64 x f
S
IF MCLK / LRCLK = 256 OR 512
• INTERNAL SCLK = 48 x f
S
IF MCLK / LRCLK = 384
15
10
8
9
7
6
5
4
3
2
1
0
11
12
13
14
LRCLK
SCLK
SDATA
MSB
LSB
LSB
MSB
DATA DIRECTED TO OUTL
DATA DIRECTED TO OUTR
10
8
9
7
6
5
4
3
2
1
0
11
12
15
13
14
17
16
17
16
Figure 7. MAX5559 Data Format Timing