Renesas REG10J0020-0200 - Manual (Page 12)

JA2
Pin Generic Header Name CPU board
Signal Name
Pin Header Name CPU board
Signal Name
1 Open drain RESn 2 External Clock Input EXTAL
3 Open drain NMIn 4 Regulated Supply 1 Vss1
5 Open drain output WDT_OVF 6 Serial Port SCIaTX
7 Open drain WUP IRQ0 8 Serial Port SCIaRX
9 Open drain IRQ1 10 Serial Port SCIaCK
11 Up/down MO_UD 12 Serial Port Handshake CTS/RTS
13 Motor control MO_Up 14 Motor control MO_Un
15 Motor control MO_Vp 16 Motor control MO_Vn
17 Motor control MO_Wp 18 Motor control MO_Wn
19 Output TMR0 20 Output TMR1
21 Input TRIGa 22 Input TRIGb
23 Open drain IRQ2 24 Tristate Control TRSTn
25 SPARE - 26 SPARE -
Table 5-2: JA2 Standard Generic Header
Table 5-3 and Table 5-4 below show the optional generic header connections
JA5
Pin Generic Header Name CPU board
Signal Name
Pin Header Name CPU board
Signal Name
1 ADC4 I4 AD4 2 ADC5 I5 AD5
3 ADC6 I6 AD6 4 ADC7 I7 AD7
5 CAN CAN1TX 6 CAN CAN1RX
7 CAN CAN2TX 8 CAN CAN2RX
9 Reserved 10 Reserved
11 Reserved 12 Reserved
13 Reserved 14 Reserved
15 Reserved 16 Reserved
17 Reserved 18 Reserved
19 Reserved 20 Reserved
21 Reserved 22 Reserved
23 Reserved 24 Reserved
Table 5-3: JA5 Optional Generic Header
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