National Instruments PC-DIO-96 - Manual (Page 37)

Theory of Operation Chapter 3
PC-DIO-96 User Manual 3-2 © National Instruments Corporation
Data Transceivers
The data transceivers control the sending and receiving of data to and from the PC I/O channel.
PC I/O Channel Control Circuitry
The base address used by the board is determined by an onboard switch setting. The address on
the PC I/O channel bus is monitored by the address decoder, which is part of the I/O channel
control circuitry. If the address on the bus matches the selected I/O base address of the board,
the board is enabled and the corresponding register on the PC-DIO-96 is accessed.
In addition, the I/O channel control circuitry monitors and transmits the PC I/O channel control
and support signals. The control signals identify transfers as read or write, memory or I/O, and
8-bit, 16-bit, or 32-bit transfers. The PC-DIO-96 uses only 8-bit transfers.
82C55A Programmable Peripheral Interface
The four 82C55A PPI chips are the heart of the PC-DIO-96. Each of these chips has 24
programmable I/O pins that represent three 8-bit ports: PA, PB, and PC. Each port can be
programmed as an input or an output port. The 82C55A has three modes of operation: simple
I/O (mode 0), strobed I/O (mode 1), and bidirectional I/O (mode 2). In modes 1 and 2, the three
ports are divided into two groups: group A and group B. Each group has eight data bits and four
control and status bits from port C (PC). Modes 1 and 2 use handshaking signals from port C to
synchronize data transfers. Refer to Chapter 4, Register-Level Programming, or to Appendix B,
OKI 82C55A Data Sheet, for more detailed information.
8253 Programmable Interval Timer
The 8253 Programmable Interval Timer is used to generate timed interrupt requests to the host
computer. The 8253 has three 16-bit counters, which can each be used in one of six different
modes. The PC-DIO-96 uses two of the counters to generate interrupt requests; the third counter
is not used and is not accessible to the user. Refer to Chapter 4, Register-Level Programming, or
to Appendix C, AMD 8253 Data Sheet, for more detailed information.
Interrupt Control Circuitry
The interrupt level used by the PC-DIO-96 is selected by the onboard jumper, W1. Two
software-controlled registers determine which devices, if any, generate interrupts. Each of the
four 82C55A devices has two interrupt lines, PC3 and PC0, connected to the interrupt circuitry.
The 8253 device has two of its three counter outputs connected to the interrupt circuitry. Any of
these 10 signals can interrupt the host computer if the interrupt circuitry is enabled and the
corresponding enable bit is set (see Chapter 4, Register-Level Programming, for more
information). Normally, PC3 and/or PC0 of the 82C55A devices are controlled by the