Philips TDA8303A - Manual (Page 12)

July 1992 12
Philips Semiconductors Preliminary specification
Small signal combination IC for black/white TV
TDA8303
TDA8303A
connected to the supply. The reference circuit must be tuned in such a way that the output is symmetrical clipping at
maximum volume.
13. The test set-up is illustrated by Fig.6. The AM rejection curve (typical) is illustrated by Fig.7.
14. The output signal is measured at a
∆
f = 7.5 kHz and maximum volume control.
15. The demodulator tuned circuit must be tuned at minimum distortion.
16. Weighted noise, measured in accordance with CCIR 468.
17. See also note 1. The volume can be controlled by using a potentiometer connected to ground (value 4.7 k
Ω
) or by
means of a variable direct voltage. In the latter event the relatively low input impedance must be taken into account.
18. The AFC control voltage is obtained by multiplying the IF output signal (which is also used to drive the synchronous
demodulator) with a reference carrier. This reference carrier is obtained from the demodulator tuned circuit via a 90
degree phase shift network.The IF output signal has an asymmetrical frequency spectrum with respect to the carrier
frequency. To avoid problems due to this asymmetrical signal the AFC circuit is followed by a sample-and-hold circuit
which samples during the sync level. As a result the AFC output voltage contains no video information. The specified
control slope decreases when the AFC output is loaded with two resistors between the voltage supply and ground.
19. At very weak input signals the drive signal for the AFC circuit will have a high noise content. This noise input has an
asymmetrical frequency spectrum which will cause an offset of the AFC output voltage. The characteristics given for
weak signals are measured with a SAW filter (OFW 1956) connected in front of the IC input signal such that the input
signal of the IC is 150
µ
V RMS.
20. The minimum value is obtained by connecting a 1.8 k
Ω
resistor between pins 17 and 25. The slicing level can be
varied by changing the value of this resistor (higher resistor value results in larger value of the minimum sync pulse
amplitude). The slicing level is independent of the video information.
21. Frequency control is obtained by supplying a correction current to the oscillator RC network via a resistor connected
between the phase 1 detector output and the oscillator network. The oscillator can be adjusted to the correct
frequency by short circuiting the sync separator bias network (pin 25) to the voltage supply. To avoid the need of a
VCR switch the time constant of the phase detector at strong input signals is sufficiently short to obtain a stable
picture during VCR playback. During the vertical retrace period the time constant is even shorter so that the
head
−
errors of the VCR are compensated at the beginning of scan. During conditions of weak signal (information
derived from the AGC circuit) the time constant is increased to obtain a better noise immunity.
22. This figure is valid for an external load impedance of 82 k
Ω
between pin 28 and the phase adjustment potentiometer.
23. The functions in-sync/out-of-sync and transmitter identification have been combined on pin 22. The capacitor is
charged during the sync pulse and discharged during the time difference between gating (6.5
µ
s) and the sync pulse.
24. The vertical scan is synchronized by means of a divider system. Therefore no frequency adjustment is required for
the ramp generator. The divider detects whether the incoming signal has a vertical frequency of 50 or 60 Hz and
corrects the vertical amplitude.
25. These figures are based on test samples.
26. Measured at an input signal amplitude of 150
µ
V RMS (pin 18).