PMC-Sierra Pm25LV512 User Manual
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Programmable Microelectronics Corp.
Issue Date: February, 2004, Rev: 1.4
PMC
Pm25LV512/010
BLOCK ERASE Timing
CHIP ERASE Timing
0
1
2
3
4
5
6
7
8
9
10
11
28
29
30
31
0
1
2
3
21
22
23
...
3 - B Y T E A D D R E S S
INSTRUCTION = 1101 1000b
H I G H I M P E D A N C E
C E #
S C K
SI
S O
0
1
2
3
4
5
6
7
H I G H I M P E D A N C E
S C K
C E #
SI
S O
INSTRUCTION = 1100 0111b
0
1
2
3
4
5
6
7
8
9
10
11
28
29
30
31
0
1
2
3
21
22
23
...
3 - B Y T E A D D R E S S
INSTRUCTION = 1101 0111b
H I G H I M P E D A N C E
C E #
S C K
SI
S O
SECTOR ERASE Timing
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