Philips ISP1561 - Manual (Page 3)

Philips Semiconductors ISP1561 Evaluation Board User’s Guide
UM10005_3 © Koninklijke Philips Electronics N.V. 2003. All rights reserved.
User’s Guide Rev. 2.0—April 2003 3 of 20
CONTENTS
1. INTRODUCTION.................................................................................................................................. 4
2. ISP1561 PIN CONFIGURATION........................................................................................................ 5
3. SYSTEM REQUIREMENTS .................................................................................................................. 5
4. ISP1561 EVALUATION BOARD ........................................................................................................ 6
4.1. P ORT P OWERED LED S ...........................................................................................................................................................6
4.2. G OOD L INK LED S ....................................................................................................................................................................6
4.3. V
AUX
P OWER S UPPLY ................................................................................................................................................................6
4.4. L EGACY S UPPORT ....................................................................................................................................................................7
4.5. I NPUT C LOCK ..........................................................................................................................................................................8
4.6. E XTERNAL 5 V P OWER S OURCE AND S3 W AKE -U P C APABILITY ....................................................................................8
4.7. L OADING THE S UBSYSTEM ID AND V ENDOR ID FROM THE E XTERNAL EEPROM........................................................8
5. HI-SPEED USB (EHCI) DRIVERS ....................................................................................................... 9
6. LOADING OF THE ISP1561 DRIVERS............................................................................................ 10
6.1. L OADING OF OHCI D RIVERS ............................................................................................................................................. 10
6.2. L OADING OF EHCI D RIVERS .............................................................................................................................................. 13
7. SCHEMATICS ...................................................................................................................................... 15
8. BILL OF MATERIALS ......................................................................................................................... 19
9. REFERENCES....................................................................................................................................... 20
FIGURES
Figure 1-1: ISP1561 Evaluation Board...........................................................................................................................................................................4
Figure 2-1: Pin Configuration..........................................................................................................................................................................................5
Figure 4-1: Evaluation Board Schematic.......................................................................................................................................................................6
Figure 4-2: Block Diagram of Legacy Signal Connection and Testing .................................................................................................................7
Figure 4-3: I 2 C-bus EEPROM Programming Example...............................................................................................................................................9
I
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