Pathway DMX Pathfinder CR Manual - Manual (Page 34)

DMX Distribution System Page 34
DMXPathfinder - Hardware
.2 FRAME CONTROL MODULE -- DMS-FCM
The main function of the Frame Control Module is to act as a buffer for
system I/O data between the Output Modules and the system I/O bus. It
also monitors system I/O bus activity. The Frame Control Module
incorporates the following hardware subsections:
Processor Section (Sheet 1) -- The processor section is comprised of the
microprocessor U19, watchdog timer/reset controller U17, address switches
SW1 and SW2, and a system communications interface. U5, U6 and U7 are
RS485 transmitters and receivers which provide for the movement of
commands, patch data and status information between the Frame Control
Module and the Output Modules in the slave frames (U6 and U7C), and the
Master Control and Input Modules over the system COM bus (U5 and U7B).
U7A receives the system hardware reset from the Master Module and re-
sends the signal to the Output Modules via U18. JP1 is a test jig port for
factory use only.
Bus Buffer and Monitor Section (Sheet 2) -- DMX data present on the
system I/O bus connects to the Frame Control Module at J2. From here,
data moving in the send direction is buffered by U12 and U14, then placed
on the Slave/Output Frame Bus at J1. Data moving in the return direction on
the frame bus from the Output Modules appears at J1, is buffered by U13
and U15, and is placed on the system I/O return bus by RS485 gated
transmitters U26-U41, which in turn are controlled by demultiplexers U24 and
U25. Gating is required to prevent more than one Frame Control Module
from trying to place data on the system I/O return bus at the same time.
Multiplexers U8, U9, U10 and U11 monitor for the presence of data on the
send and return busses and pass this status information back to the
microprocessor.
Power Supply Section (Sheet 1) -- AC power at 120 volts 60 Hz is brought
to the module by backplane connector J3. A polyswitch (self-resetting) fuse
protects on-board components. JP3 is a power input selection jumper (E1-
E2 and E3-E4 are jumpered for 120 volt operation, E2-E3 are jumpered for
240 volts). A power transformer T1 with two 8 volt secondary windings is
provided. T1's secondaries are paralleled for higher current rating, then
rectified by D1/D2, filtered by C1/C2 and regulated at 5 volts by VR1. The
resulting VCC supply is used by all components on the board and is also