IBM POWERPC 750GL - Manual (Page 230)

User’s Manual
IBM PowerPC 750GX and 750GL RISC Microprocessor
Instruction Timing
Page 230 of 377
gx_06.fm.(1.2)
March 27, 2006
Predicted Branch Timing Examples
Figure 6-10 on page 231 shows cases where branch instructions are predicted. It shows how both taken and
not-taken branches are handled, and how the 750GX handles both correct and incorrect predictions. The
example shows the timing for the following instruction sequence:
0 add
1 add
2 bc
3 mulhw
4 bc T0
5 fadd
6 and
7 or
8 sub
•
•
•
T0 add
T1 add
T2 add
T3 add
T4 and
T5 or