IBM POWERPC 750GL - Manual (Page 165)

User’s Manual
IBM PowerPC 750GX and GL RISC Microprocessor
gx_04.fm.(1.2)
March 27, 2006 Exceptions
Page 165 of 377
The hard reset exception is a nonrecoverable, nonmaskable, asynchronous exception. When HRESET is
asserted or at power-on reset (POR), the 750GX immediately branches to 0xFFF0_0100 without attempting
to reach a recoverable state. A hard reset has the highest priority of any exception. It is always nonrecover-
able.
Table 4-7 on page 166 shows the state of the machine just before it fetches the first instruction of the system
reset handler after a hard reset. In Table 4-7, the term “Unknown” means that the content might have been
disordered. In particular, the Floating Point Registers (FPRs), BATs, and TLBs might have been disordered.
These facilities must be properly initialized before use. To initialize the BATs, first set them all to zero, then to
the correct values before any address translation occurs. FPR registers should also be initialized before
processing continues.