ELAN Home Systems EM78P458 - Manual (Page 36)

EM78P458/459
OTP ROM
;ADC Control Registers
ADDATA == 0xA ; The contents are the results of ADC
ADCON R== 0x9 ; 7 6 5 4 3 2 1 0
; - - IOCS ADRUN ADPD ADIS2 ADIS1 ADIS0
ADCONC== 0xA ; 7 6 5 4 3 2 1 0
; VREFS X X IMS2 IMS1 IMS0 CKR1 CKR0
GCON == 0x9 ; 7 6 5 4 3 2 1 0
; OPE2 OPE1 G22 G21 G20 G12 G11 G10
;To define bits
;In ADCONR
ADRUN == 0x4 ; ADC is executed as the bit is set
ADPD == 0x3 ; Power Mode of ADC
ORG 0 ; Initial address
JMP INITIAL ;
ORG 0x08 ; Interrupt vector
(User program)
CLR R_F ; To clear the ADCIF bit
BS ADCONR, ADRUN ; To start to execute the next AD conversion if necessary
RETI
INITIAL:
MOV A, @0BXXXX1XXX ; Enable the interrupt function of ADC, “X” by application
IOW C_INT
MOV A, @0xXX ; Interrupt disabled:<6>
This specification is subject to change without prior notice. 07.01.2003 (V1.3) 36