Yaskawa NS300 - Manual (Page 11)

Subject: Technical Note Product: NS300/NS500 Doc#: EM.MCD.05.106
Title: NS300/500 Master Ladder Example
Doc#: Copyright Yaskawa Electric America
©2004
May 9, 2007 Page 11 of 16
The COMMAND_OVERRIDE coil is set in any one of four conditions. The first occurs if the servo is disabled as
reported by the SVON_R response bit from the NS300/500. A normally closed contact of
SET_READ_COMMAND is also included in this first rung. During set/read commands, the NS300/500 allows the
servo to be disabled. The second and third conditions for setting the command override occur in an over-travel
condition. It may be beneficial to the user to add an additional interlock to this circuit in order to jog back across
the over-travel sensor.
The last condition occurs after the command has actually been activated. Completed motion commands are
identified on the falling edge of the PRGS bit. Some conditions occur in which the PRGS bit never cycles,
eliminating a falling edge of the PRGS bit from occurring. This last rung of logic is used to clear the command bit
in cases where the PRGS bit never cycles. If the NS300/500 reports that the motor is in position (INPOS and
NEAR), and the PRGS bit is low (meaning a falling edge cannot occur), then the motor is in position. If this
occurs while COMMAND_BIT is still high, a timer checks for 50ms and then sets COMMAND_OVERRIDE in
order to clear the latched COMMAND_BIT. This can occur in the following two conditions:
1. Commanding the servo to move to its current position. PRGS bit never goes high because the servo is
already in position and no move is required.
2. The move distance is short, so the timing of the PRGS bit is less than one transmission cycle.
Once COMMAND_BIT is set, the coil must be latched in order for the coil to remain active. The bottom two rungs
of the COMMAND_BIT circuit are shown above (also from line 33). The middle rung is selected as the latch
circuit for motion commands (non set/read) and the bottom rung is selected as the latch circuit for set/read
commands.
Fig 7. Command Bit Latch Circuits