Yaskawa NS300 - Manual (Page 10)

Subject: Technical Note Product: NS300/NS500 Doc#: EM.MCD.05.106
Title: NS300/500 Master Ladder Example
Doc#: Copyright Yaskawa Electric America
©2004
May 9, 2007 Page 10 of 16
Command Bit Sequencing
The last main topic is proper command bit sequencing and interlocking. One command bit circuit is used in this
program for all commands. The coil of the command bit circuit is then interlocked with the selected command to
set the appropriate command bit of the output message. The command bit circuit is shown below.
Fig 5. Command Bit Sequencing Circuit
As previously described, the COMMAND_BIT coil is set on the rising edge of the PLC_COMMAND_START bit as
long as the COMMAND_OVERRIDE bit remains low and the READY bit remains high. READY is an input from
the NS300/500 indicating that a command can be executed, and COMMAND_OVERRIDE is a coil in the program
that is used to lockout any commands from being executed under certain conditions. The
COMMAND_OVERRIDE circuit in line 32 is shown below.
Fig 6. Command Override Circuit