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Sundance FC203A User Manual

Page 5

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Page 5 of 5

Revision 0.5

Sundance Digital Signal Processing Inc.

4790 Caughlin Parkway 233, Reno, NV 89519-0907, U.S.A.

Tel: +1 (775) 827-3103, Fax: +1 (775) 827-3664, email:

[email protected]

www.sundancedsp.com

2. I/O

DESCRIPTION


The FC203A component presents as a pure-FPGA ‘task’, and implements the following
interface:

Port Name

Channel Valid

Width

Direction Description

I0_IN,
I1_IN

0,
2

16

Input

In-Phase Component, frequency-domain
data (2 channels)

Q0_IN,
Q1_IN

1,
3

16

Input

Quadrature Component, frequency-domain
data (2 channels)

CTRL_IN 4 32 Input

Control

Word

F0_OUT,
F1_OUT

0,
1

64

Output

In-phase/Quadrature components, 2-
channels each

STATUS_OUT 2

32

Output

Pass-through

control/status

Table 1 –FC203A Interfaces

Additional port descriptions are provided below:

I0_IN .. I1_IN

There are two input ports for in-phase frequency domain streams. Data values are pairs of 16-bit
extended twos-complement as described in the FC108 User Manual, although the extended sign
value in bits 16-31 is ignored. These ports are suitable for connecting to the FC108-D’s I_OUT
ports.

Q0_IN .. Q1_IN

There are two input ports for the quadrature frequency streams. Data values are pairs of 16-bit
extended twos-complement as described in the FC108 User Manual. These ports are suitable for
connecting to the FC108-D’s Q_OUT ports.

NOTE: In agreement with the implementation of FC108, the input ports xn_IN are always
“ready” when any enable bit is set. To avoid the need for buffering in this module the
downstream data sinks must also be ready whenever this module has data to write. A FIFO may
be required at the output of this module to insure this.

NOTE: For simplicity, it is assumed that all four input channels (or the active subset) will
“write” at the same time. If this does not occur then the FC203A’s bin count will be in error on
some channels. There is currently no way to detect or report this condition.

CTRL_IN

Control miscellaneous parameters and features of the FC203A subcomponent. The port accepts
data one 32-bit word at a time.