Fpga, Comport, Jtag – Sundance SMT145 User Manual
Page 10: Jtag for the tim
Version 1.1
Page 10 of 18
SMT145 User Manual
From the software point of view, the RSL and comport are accessible from the host
machine via the X-Link interface.
FPGA
A Xilinx VirtexII-Pro VP7 FPGA is used for the control of the RSL, the comport and
the PCI interface.
PCI
The PCI interface is provided by a PCI core within the FPGA. This is a 64-bit PCI
device which runs at up to 66MHz allowing for transfer rates of about 533Mbytes/s
between the SMT145 and the host machine.
RSL
One RSL connector is connected to the FPGA via four Rocket IO lanes. This
connector allows data transfer close to 1GB/s with the TIM plugged on the SMT145.
Comport
A host comport allow data transfer between the host machine and the TIM. The data
rate is about 20MB/s.
There are five comports connectors available on the SMT145. They are connected
directly to the comports of the TIM. They are available thought connectors JP1, JP2,
JP4, JP5 and JP8.
JP1 connects to TIM comport 0.
JP2 connects to TIM comport 4.
JP4 connects to TIM comport 1.
JP5 connects to TIM comport 5.
JP8 connects to TIM comport 2.
JTAG
The SMT145 provides JTAG connection for both the carrier itself and the TIM site.
There are three JTAG connectors available.
JTAG for the TIM
The SMT145 doesn’t have an on-board JTAG controller. To be able to access the
TIM plugged on the SMT145 via JTAG, a JTAG emulator must be connected to the
connector
. Various emulators are available:
• XDS510
• XDS560