Sundance FC100 - Manual (Page 6)

4 Functional Description
4.1 Mathematical equations
The Discrete Fourier Transform (DFT), of length N (N=2m), calculates the sampled Fourier
transform of a discrete-time sequence with N points evenly distributed.
The forward DFT with N points of a sequence x(n) can be written as follows:
1 , , 0 ,
2
). ( ) (
1
0
 

 



N k
N
nk j
e n x k X
N
n


The inverse DFT is given by the following equation:
1 , , 0 ,
2
). (
1
) (
1
0
   



N k
N
nk j
e k X
N
n x
N
n


4.2 Algorithm
The pipelined Floating point FFT IP core uses modular radix-2 Fast Fourier Transform (FFT)
architecture to provide discrete Fourier transforms (DFT) on data frames or continuous data
streams, with sample rate up to the maximum clock frequency.
This efficient structure employs a single butterfly and a single delay feedback path per rank
for low localized memory usage. True IEEE-754 floating point data maintained throughout,
supporting a large dynamic range of data without requiring complicated fixed-point analysis.
The standard pipelined IP Core is easily scalable to any Xilinx device and customisable to suit
many FFT applications.
This FFT core is designed for FFT computation larger or equal to 32 points and up to 64M
points. External memory, such as QDR/QDR2 SRAM, ZBT RAM, DDR/DDR2/DDR3
SDRAM, is most suited for transforms larger than 16384 points. For shorter transforms,
memory banks can likely be implemented inside the FPGA depending on which device is
used.
User Manual FC100 Page 6 of 12 Last Edited: 25/11/2008 15:00:00