Sensoray 118 - Manual (Page 12)

Sensoray Model 118 Smart A/D™ Instruction Manual 10 Programming
5 Programming
Smart A/D™ programming is accomplished by means of
built-in commands. Commands may be sent from any
VMEbus master (referred to as the host, or client) to the
Smart A/D™. Some commands cause the Smart A/D™
to respond by returning data to the host.
This chapter explains the mechanism behind this
bidirectional communication and provides sample drivers
that are referenced throughout the command set
descriptions. Because of its wide usage in the industry,
the C/C++ programming language is used to code all
programming examples.
Chapter 6 details the command set. A general-purpose
driver function is shown for each command, along with
one or more examples showing how to employ the driver
in an application program.
5.1 Programming Model
The Smart A/D™ occupies two contiguous addresses in
any VMEbus standard short memory space. Both of the
addresses occupied by the board may be written to and
read from, but each address has a distinct function for
read and write operations.
The command/data port (base address) provides the data
path between the Smart A/D™ and the host. The host
“sends” a command byte to the Smart A/D™ by storing it
in the command register. The host “reads” a command
response byte by fetching the contents of the data
register. Because the command register is write-only and
the data register is read-only, both of these registers are
able to share the same port address.
The status/reset port (base address + 1) also has a dual
function. In the case of read operations, it provides
Smart A/D™ status information to the host (see Section
5.1.1). When the host writes a byte to the status port a
hardware reset is invoked on the Smart A/D™. The data
value written to the port is “don’t care,” but should be set
to zero to ensure compatibility with future product
enhancements.
Figure 13: Bus interface block diagram
5.1.1 Handshake Mechanism
The status register provides the host with information
used for Smart A/D™ status monitoring and
communication handshake control. When the host reads
the status register, a byte of the following form is
returned:
Status register bits, which are all active-high, have the
following functions:
• CRMT indicates Smart A/D™ is ready for a command
byte. The host should write to the command
register only when CRMT is active.
• DAV indicates Smart A/D™ data register contains data
for the host. The host should read from the data
register only when DAV is active.
• ALRM indicates one or more programmed channel
limits were exceeded.
• FLT indicates board reset in progress or board fault
detected. In normal operation this bit goes active for
approximately one-half second following a board reset.
FLT reflects the state of the red LED fault indicator.
When FLT is active, the CRMT, DAV and ALRM
bits are not meaningful and should be ignored.
Table 4: Programming model
Port
Address
Function
Read Write
Base + 0 Data Register Command Register
Base + 1 Status Register Board Reset
Table 5: Status Register
D7 D6 D5 D4 D3 D2 D1 D0
CRMT DAV ALRM FLT X X X X
D
at
a
B
u
s
B
u
ff
er
S
Y
S
T
E
M
B
U
S
M
ic
ro
co
m
p
u
te
r
Base Port
Data
Register
Command
Register
Base Port + 1
Status
Register
Soft Reset
Trigger