Nevion 3GHD-CHO-2x4 - Manual (Page 6)

3GHD-CHO-2x4/2x3 Rev. C
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Specifications
Electrical Outputs
Connectors 75 Ohm BNC
Output Return loss - < -15dB, 5MHz -1.5GHz
- < -10dB, 1.5GHz - 3GHz
Output signal level 800mV +/- 10%
Note: for the passive bypass versions (using backplane C2 or
C4) the signal is attenuated with a cable equivalent of 15m.
Output signal rise / fall time
20% - 80%
- SD limit: [0.4ns – 1.5ns]; <0.5ns rise/fall var.
- HD limit: < 270ps, <100ps rise/fall var.
- 3G HD limit: <135ps, <50ps rise/fall var.
Amplitude overshoot <10%
Polarity - Output O1A, O1B, O2A and O2B: Non inverting electrical
- Remaining outputs: inverting electrical
Output timing jitter - SD: <0.2 UI
- HD: <1 UI
- 3G HD: <1UI
Output alignment jitter - SD: <0.15 UI
- HD: <0.15 UI
- 3G HD: <0.2UI
Electrical Inputs
Connectors 75 Ohm BNC
Input Cable Eq. @270Mbps >300m w/Belden 1694A, with BER < 10E-12
Input Cable Eq. @1485Mbps >100m w/Belden 1694A, with BER < 10E-12
Input Cable Eq. @2970Mbps Ver. C1 and C3: >70m w/Belden 1694A, with BER < 10E-12
Ver. C2 and C4: >60m w/Belden 1694A, with BER < 10E-12
Input Return loss - < -15dB, 5MHz -1.5GHz
- < -10dB, 1.5GHz - 3GHz
Jitter tolerance - SD limit:
- 10Hz-1kHz: >1 UI
- 10kHz – 5MHz: >0.2 UI
- HD limit:
- 10Hz-100kHz: >1 UI
- 100kHz–10MHz: >0.2 UI
- 3G HD limit:
- 10Hz-100kHz: >2 UI
- 100kHz–10MHz: >0.3 UI
Features
Reclocking: Automatic SD/ HD detection
Automatic output slew rate adjustment according to SMPTE
259M and SMPTE 292M/ SMPTE 424M
Supported clock rates: 270, 1483.5, 1485, 2967, 2970Mbps
Input equalizers: Eq. bypass for non-video formats or low bit rates
Supported standards
SMPTE: SMPTE 424M, SMPTE 292M, SMPTE 259M, SMPTE 305M,
SMPTE 310M
DVB-ASI: EN50083-9 (on non-inverting outputs)
General
DC power consumption: +5V / < 4.5W