Measurement Computing ADLIB WIN - Manual (Page 117)

Chapter 39 Counter Modes 26-1
26. COUNTER / TIMERS
Both the Pci5500 and Pci5500 Series support two counters and two timers. Both counters provide either
cumulative or incremental counting capabilities. The counters are capable of counting 5 V LSTTL rising
edges. The timers provide a 50% duty cycle square wave 5 V LSTTL output with an output frequency
range of 7.7 Hz to 500 kHz.
26.1 AL_SetCtrMode
Prototype C\C++
ERRNUM AL_SetCtrMode(LHLD lhld, LPSTR lpstrMode);
Visual Basic for Windows
Function AL_SetCtrMode(ByVal lhld As Long,
ByVal lpstrMode As String) As Long
LHLD lhld handle of the LDSD
LPSTR lpstrMode address of the Counter/Timer mode string
The AL_SetCtrMode function sets the hardware Counter/Timer operation mode of the LDSD.
Parameter Description
lhld Identifies the instance of the logical device subsystem.
lpstrMode
Points to the desired Counter/Timer mode string. The available string settings
are device
independent and are verified by ADLIB against the available trigger mode
options specified in the device's capabilities file.
Returns:
On success ERRNUM is set to 1, otherwise ERRNUM contains the last error code that occurred during the
call.
Related Functions:
AL_GetCtrMode
AL_CounterIn
AL_CounterOut
Supported Logical Device Subsystems:
Pci55xxSeries: CTR0, CTR1 Options:
“PULSE_COUNTER_INCREMENTAL“,
“PULSE_COUNTER_CUMMULATIVE“
Note that CTR0, CTR1 Counters are referenced in the user manual as CNTR0/1.
Pci55xx Series: CTR2, CTR3 Options: “SQUARE_WAVE_OUTPUT“
Note Timers CTR2, CTR3 are referenced in the user manual as TMR0/1.