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Chapter 2 – DFI COM100-B User Manual

Page 26

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Chapter 2 Hardware Installation

26

Chapter 2

Signal Descriptions

Pin

Row A

Row B

Row C

Row D

42

USB2-

USB3-

DDI3_PAIR1+

DDI2_PAIR1+

43

USB2+

USB3+

DDI3_PAIR1-

DDI2_PAIR1-

44

USB_2_3_OC#

USB_0_1_OC#

DDI3_HPD

DDI2_HPD

45

USB0-

USB1-

RSVD

19

RSVD

19

46

USB0+

USB1+

DDI3_PAIR2+

DDI2_PAIR2+

47

VCC_RTC

EXCD1_PERST#

DDI3_PAIR2-

DDI2_PAIR2-

48

EXCD0_PERST#

EXCD1_CPPE#

RSVD

19

RSVD

19

49

EXCD0_CPPE#

SYS_RESET#

DDI3_PAIR3+

DDI2_PAIR3+

50

LPC_SERIRQ

CB_RESET#

DDI3_PAIR3-

DDI2_PAIR3-

51

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

52

PCIE_TX5+

PCIE_RX5+

PEG_RX0+

PEG_TX0+

53

PCIE_TX5-

PCIE_RX5-

PEG_RX0-

PEG_TX0-

54

GPI0

GPO1

TYPE0#

PEG_LANE_RV#

55

PCIE_TX4+

PCIE_RX4+

PEG_RX1+

PEG_TX1+

56

PCIE_TX4-

PCIE_RX4-

PEG_RX1-

PEG_TX1-

57

GND

GPO2

TYPE1#

TYPE2#

58

PCIE_TX3+

PCIE_RX3+

PEG_RX2+

PEG_TX2+

59

PCIE_TX3-

PCIE_RX3-

PEG_RX2-

PEG_TX2-

60

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

61

PCIE_TX2+

PCIE_RX2+

PEG_RX3+

PEG_TX3+

62

PCIE_TX2-

PCIE_RX2-

PEG_RX3-

PEG_TX3-

63

GPI1

GPO3

RSVD

19

RSVD

19

64

PCIE_TX1+

PCIE_RX1+

RSVD

19

RSVD

19

65

PCIE_TX1-

PCIE_RX1-

PEG_RX4+

PEG_TX4+

66

GND

WAKE0#

PEG_RX4-

PEG_TX4-

67

GPI2

WAKE1#

RSVD

19

GND

68

PCIE_TX0+

PCIE_RX0+

PEG_RX5+

PEG_TX5+

69

PCIE_TX0-

PCIE_RX0-

PEG_RX5-

PEG_TX5-

70

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

71

LVDS_A0+

LVDS_B0+

PEG_RX6+

PEG_TX6+

72

LVDS_A0-

LVDS_B0-

PEG_RX6-

PEG_TX6-

73

LVDS_A1+

LVDS_B1+

GND

GND

74

LVDS_A1-

LVDS_B1-

PEG_RX7+

PEG_TX7+

75

LVDS_A2+

LVDS_B2+

PEG_RX7-

PEG_TX7-

76

LVDS_A2-

LVDS_B2-

GND

GND

77

LVDS_VDD_EN

LVDS_B3+

RSVD

19

RSVD

19

78

LVDS_A3+

LVDS_B3-

PEG_RX8+

PEG_TX8+

79

LVDS_A3-

LVDS_BKLT_EN

PEG_RX8-

PEG_TX8-

80

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

81

LVDS_A_CK+

LVDS_B_CK+

PEG_RX9+

PEG_TX9+

82

LVDS_A_CK-

LVDS_B_CK-

PEG_RX9-

PEG_TX9-

83

LVDS_I2C_CK

LVDS_BKLT_CTRL

RSVD

19

RSVD

19

84

LVDS_I2C_DAT

VCC_5V_SBY

GND

GND

85

GPI3

VCC_5V_SBY

PEG_RX10+

PEG_TX10+

86

RSVD

19

VCC_5V_SBY

PEG_RX10-

PEG_TX10-

87

eDP_HPD

VCC_5V_SBY

GND

GND

88

PCIE_CLK_REF+

BIOS_DIS1#

PEG_RX11+

PEG_TX11+

89

PCIE_CLK_REF-

VGA_RED

PEG_RX11-

PEG_TX11-

90

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

PICMG® COM.0 Revision 2.1 COM Express® Base Specification, Mar 28, 2012
Revision 2.1 - Draft 0.92 / Copyright PICMG (file PICMG_COM_0_R2_1_D092.odt)
DRAFT Version - Do Not Design To/Do Not Claim Compliance To/Do Not Distribute This Document

88

Signal Descriptions

Pin

Row A

Row B

Row C

Row D

91

SPI_POWER

VGA_GRN

PEG_RX12+

PEG_TX12+

92

SPI_MISO

VGA_BLU

PEG_RX12-

PEG_TX12-

93

GPO0

VGA_HSYNC

GND

GND

94

SPI_CLK

VGA_VSYNC

PEG_RX13+

PEG_TX13+

95

SPI_MOSI

VGA_I2C_CK

PEG_RX13-

PEG_TX13-

96

TPM_PP

VGA_I2C_DAT

GND

GND

97

TYPE10#

SPI_CS#

RSVD

19

RSVD

19

98

SER0_TX

RSVD

19

PEG_RX14+

PEG_TX14+

99

SER0_RX

RSVD

19

PEG_RX14-

PEG_TX14-

100

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

101

SER1_TX

FAN_PWNOUT

PEG_RX15+

PEG_TX15+

102

SER1_RX

FAN_TACHIN

PEG_RX15-

PEG_TX15-

103

LID#

SLEEP#

GND

GND

104

VCC_12V

VCC_12V

VCC_12V

VCC_12V

105

VCC_12V

VCC_12V

VCC_12V

VCC_12V

106

VCC_12V

VCC_12V

VCC_12V

VCC_12V

107

VCC_12V

VCC_12V

VCC_12V

VCC_12V

108

VCC_12V

VCC_12V

VCC_12V

VCC_12V

109

VCC_12V

VCC_12V

VCC_12V

VCC_12V

110

GND(FIXED)

GND(FIXED)

GND(FIXED)

GND(FIXED)

PICMG® COM.0 Revision 2.1 COM Express® Base Specification, Mar 28, 2012

Revision 2.1 - Draft 0.92 / Copyright PICMG (file PICMG_COM_0_R2_1_D092.odt)

89

DRAFT Version - Do Not Design To/Do Not Claim Compliance To/Do Not Distribute This Document