ADLINK HSL-DI32-M-N/HSL-DI32-M-P - Manual (Page 49)

36 HSL Master Controller
2.5 Software Architecture Description
The PCI-7853/PCI-7854/PMC-7852/G comes with one or two HSL
master ASICs that control the HSL communication. The purpose
of communicating with HSL I/O modules is to gather input data
from or set output value to them. To achieve this purpose, each
HSL master controller manages a 2Kbyte SRAM on PCI-7853/
PCI-7854 boards for data storage.
For every polling cycle, the master refreshes all input data from
the I/O modules and sets the latest output data to the I/O modules.
The SRAM keeps these data for the software drivers to read/write
I/O information.
2.5.1 Functional Block Diagram
Figure 2-6: Functional Block diagram of HSL master
The diagram above shows how the HSL communicates with the
user’s AP. The SRAM acts with a buffer-like characteristic.