ARM IM-AD1 - Manual (Page 69)

Reference Design Example
ARM DUI 0163B Copyright © 2001-2003. All rights reserved. 4-23
4.9 SSRAM interface
The SSRAM interface provides read and write access to the 1MB ZBT SSRAM on the
logic module. Accesses take two system clock cycles for reads and writes. The interface
supports word, halfword, and byte accesses to the SSRAM.