Access PCI-DIO-24D(H) - Manual (Page 15)

Manual PCI-DIO-24DH 15
Chapter 6: Programming
These cards are I/O-mapped devices that are easily configured from any language and any language can
easily perform digital I/O through the card's ports. This is especially true if the form of the data is byte or
word wide. All references to the I/O ports would be in absolute port addressing.
Developing Your Application Software
If you wish to gain a better understanding of the programs on diskette, then the information in the
following paragraphs will be of interest to you. Refer to the data sheets and 8255-5 specification in
Appendix A.
A total of 16 register locations are used by these cards. With all counters (S03), the total becomes 32
register locations.
Address Port Assignment Operation
Base Address PA Group 0 Read/Write
Base Address +1 PB Group 0 Read/Write
Base Address +2 PC Group 0 Read/Write
Base Address +3 Control byte Write Only
Base Address +4 Unused
Base Address +5 Unused
Base Address +6 Unused
Base Address +7 Unused
Base Address +8 Unused
Base Address +9 Unused
Base Address +C Enable/Disable Buffer Write Only
Base Address +D Disable Interrupts Write Only
Base Address +E Enable Interrupts Write Only
Base Address +F Clear Interrupt latch Write Only
Base Address +10 Counter/Timer A0 Read/Write
Base Address +11 Counter/Timer A1 Read/Write
Base Address +12 Counter/Timer A2 Read/Write
Base Address +13 Counter/Timer A Control Read/Write
Base Address +14 Counter/Timer B0 Read/Write
Base Address +15 Counter/Timer B1 Read/Write
Base Address +16 Counter/Timer B2 Read/Write
Base Address +17 Counter/Timer B Control Read/Write
Base Address +18 Counter/Timer C0 Read/Write
Base Address +19 Counter/Timer C1 Read/Write
Base Address +1A Counter/Timer C2 Read/Write
Base Address +1B Counter/Timer C Control Read/Write
Table 6-1: Address Assignment Table