ALLIED Vision Technologies Prosilica GS2450 - Manual (Page 42)

Prosilica GS Technical Manual V2.0.5
42
Description of the data path
Description of the data path
The following diagrams illustrate the data flow and the bit resolution of image
data. The individual blocks are described in more detail in the AVT GigE Camera
and Driver Features document.
Prosilica GS: monochrome cameras
Prosilica GS: color cameras
Figure 25: Block diagram of Prosilica GS monochrome cameras
Figure 26: Block diagram of Prosilica GS color cameras
HIRO
S
E I
/O
RS2
32
Sensor
Analog Analog
ADC
Analog Analog
Gain Vertical
binning /
Vertical ROI
12
b
it
12 bit
Gi
g
E
12 bit
Frame
memory
Gigabit
Ethernet
interface
‡
Factory calibrated. NOT a user control.
Camera control
Offset ‡
Horizontal
binning
12 bit
Horizontal
ROI
HIRO
S
E I
/O
RS2
32
Sensor
Analog Analog
ADC
12 bit
Analog Analog
Gain
Horizontal
binning*
Vertical
binning* /
Vertical ROI
12
b
it
Gigabit
Ethernet
interface
12 bit
White balance
Offset ‡
8 bit 8/12 bit
Bayer †
Interpolation
3 X 3
Frame
memory
‡
Factory calibrated. NOT a user control.
†
For on-camera interpolated PixelFormats only—outputs 8 bit.
Raw un-interpolated PixelFormats skip this block—outputs 12 bit.
Gi
g
E
12 bit
Horizontal
ROI
Camera control
*
Color information lost while binning is active.