AAEON EMB-A50M - Manual (Page 41)

M i n i - I T X E M B - A 5 0 M
Appendix A Programming the Watchdog Timer A-5
1: WDT value is equal to 0.
0: WDT value is not equal to 0.
Watch Dog Timer Configuration Register (Index=72h,
Default=001s0000b)
Bit Description
7
WDT Time-out Value Select 1
1: Second
0: Minute
6
WDT Output through KRST (pulse) Enable
1: Enable
0: Disable
5
WDT Time-out Value Extra Select
1: 64ms x WDT Time-out value (default=4s)
0: Determined by WDT Time-out value select 1 (bit 7 of this
register)
4
WDT Output through PWRGD Enable
1: Enable
0: Disable
During LRESET# this bit is selected by JP2 power-on
strapping option.
3-0
Interrupt Level Select for WDT
Please refer to Table 8-9 Interrupt Level Mapping Table
Watch Dog Timer Time-out Value (LSB) Register (Index=73h,
Default=38h)
Bit Description
7-0 WDT Time-out Value 7-0
Watch Dog Timer Time-out Value (MSB) Register (Index=74h,
Default=00h)
Bit Description
7-0 WDT Time-out Value 15-8