Rainbow Electronics MAX1847 User Manual
Page 15
MAX1846/MAX1847
High-Efficiency, Current-Mode,
Inverting PWM Controller
______________________________________________________________________________________
15
pensation of the control loop is important to prevent
excessive output ripple and poor efficiency caused by
instability. The goal of compensation is to cancel
unwanted poles and zeros in the DC-DC converter’s
transfer function created by the power-switching and
filter elements. More precisely, the objective of com-
pensation is to ensure stability by ensuring that the DC-
DC converter’s phase shift is less than 180° by a safe
margin, at the frequency where the loop gain falls
below unity. One method for ensuring adequate phase
margin is to introduce corresponding zeros and poles
in the feedback network to approximate a single-pole
response with a -20dB/decade slope all the way to
unity-gain crossover.
Calculating Poles and Zeros
The MAX1846/MAX1847 current-mode architecture
takes the double pole caused by the inductor and out-
put capacitor and shifts one of these poles to a much
higher frequency. This makes loop compensation easi-
er. To compensate these devices, we must know the
center frequencies of the right-half plane zero (z
RHP
)
and the higher frequency pole (p
OUT2
). Calculate the
z
RHP
frequency with the following formula:
The calculations for p
OUT2
are very complex. For most
applications where V
OUT
does not exceed -48V (in a
negative sense), the p
OUT2
will not be lower than 1/8th
of the oscillator frequency and is generally at a higher
frequency than z
RHP
. Therefore:
p
OUT2
≥ 0.125
✕
f
OSC
A pole is created by the output capacitor and the load
resistance. This pole must also be compensated and
its center frequency is given by the formula:
p
OUT1
= 1 / (2
π
✕
R
LOAD
✕
C
OUT
)
Finally, there is a zero introduced by the ESR of the out-
put capacitor. This zero is determined from the follow-
ing equation:
z
ESR
= 1 / (2
π
✕
C
OUT
✕
R
ESR
)
Calculating the Required Pole Frequency
To ensure stability of the MAX1846/MAX1847, the intro-
duced pole (P
DOM
) by the compensation network must
roll-off the error amplifier gain to 1 before z
RHP
or
P
OUT2
occurs. First calculate the DC open-loop gain to
determine the frequency of the pole to introduce.
where:
B is the feedback divider attenuation factor =
(-V
OUT
/ V
REF
),
G
M
is the error amplifier transconductance =
400 µA/V,
R
O
is the error amplifier output resistance = 3 M
Ω,
M
S1
is the slope compensation factor =
[(1.636A / µs)
✕
R
CS
],
R
CS
is the selected current sense resistor,
L is the selected inductance value
If z
RHP
is at a lower frequency than p
OUT2
, the required
dominant pole frequency is given by:
p
DOM
= z
RHP
/ A
DC
Otherwise the required dominant pole frequency is:
p
DOM
= p
OUT2
/ A
DC
Determining the Compensation Component Values
Using p
DOM
, calculate the compensation capacitor
required:
C
COMP
= 1 / (2
π
✕
R
O
✕
p
DOM
)
Select the next largest standard value of capacitor and
then calculate the compensation resistor required to
cancel out the output-capacitor-induced pole (p
OUT1
)
determined previously. A zero is needed to cancel the
output-induced pole and the frequency of this zero
must equal p
OUT1
. Therefore:
z
COMP
= p
OUT1
R
COMP
= R
LOAD
✕
C
OUT
/ C
COMP
Choose the nearest lower standard value of the resis-
tor. Now check the final values selected for the com-
pensation components:
p
COMP
= 1 / [2
π
✕
C
COMP
x (R
O
+ R
COMP
)]
In order for p
COMP
to compensate the loop, the open-
loop gain must reach unity at a lower frequency than
the right-half-plane zero or the second output pole,
whichever is lower in frequency. If the second output
pole and the right-half-plane zero are close together in
frequency, the higher resulting phase shift at unity gain
(
)
(
)
(
)
A
G
R
D
V
V
R
B
R
V
T
D
R
V
L
R
M
DC
M
O
MAX
IN MIN
OUT
LOAD
CS
IN MIN
OSC
MAX
LOAD
IN MIN
CS
S
=
Ч
Ч
(
)
Ч
(
)
Ч
Ч
Ч
(
)
+
(
)
Ч
Ч
+
−
−
−
1
1
2
2
1
ZRHP
D
V
V
R
V
L
MAX
IN MIN
OUT
LOAD
OUT
=
(
)
Ч
(
)
Ч
Ч
Ч
(
)
−
−
−
1
2
2
(
)
π