Rainbow Electronics DS1993 - Manual (Page 19)

DS1992/DS1993/DS1994
19 of 23 102199
READ/WRITE TIMING DIAGRAM Figure 11 (continued)
Write-Zero Time Slot
60
µ
s
≤
t
LOW0
<
t
SLOT
120
µ
s
1
µ
s
≤
t
REC
< ∞
Read-Data Time Slot
60
µ
s
≤
t
SLOT
<
120
µ
s
1
µ
s
≤
t
LOWR
<
15
µ
s
0
≤
t
RELEASE
< 15
µ
s
1
µ
s
≤
t
REC
< ∞
t
RDV
= 15
µ
s
t
SU
< 1
µ
s
Interrupts (DS1994)
If the DS1994 detects an alarm condition, it will automatically set the corresponding alarm flag in the
Status Register. An interrupt condition begins whenever any alarm flag is set and the flag’s corresponding
interrupt bit is enabled. The interrupt condition ceases when the alarm flags are cleared (i.e., the interrupt
is acknowledged by reading the Status Register, address 200H) or if the corresponding interrupt enable bit
is disabled.
The DS1994 can produce two types of interrupts: spontaneous interrupts, called type 1, and delayed
interrupts, type 2. Spontaneous interrupts need to be armed by a Reset Pulse after all communication on
the 1–Wire bus has finished. A single falling slope on the 1–Wire bus will disarm this type of interrupt. If
an alarm condition occurs while the device is disarmed, at first a type 2 interrupt will be produced.
RESISTOR
MASTER
DS199x