Rainbow Electronics ATR0620 User Manual
Gps baseband processor atr0620 summary preliminary, Features
Features
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Utilizes the ARM7TDMI
™
ARM
®
Thumb
®
Processor Core
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Embedded ICE (In-circuit Emulation)
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128 Kbytes Internal RAM
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Fully Programmable External Bus Interface (EBI)
– Maximum External Address Space of 64 MB
– Up to Four Chip Selects
– Software Programmable 8-/16-bit External Data Bus
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16-channel GPS Correlator
– Accuracy: TBD
– Time to First Fix: TBD
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8-channel Peripheral Data Controller (PDC)
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8-level Priority, Individually Maskable, Vectored Interrupt Controller
– Three External Interrupts
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20 Programmable I/O Lines
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Three USARTs
– Two Dedicated Peripheral Data Controller (PDC) Channels per USART
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Master/Slave SPI Interface
– Two Dedicated Peripheral Data Controller (PDC) Channels
– 8- to 16-bit Programmable Data Length
– Four External Slave Chip Selects
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Programmable Watchdog Timer
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Power Management Controller (PMC)
– CPU and Peripherals Can Be Deactivated Individually
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Clock Manager (CLM)
– Geared Master Clock to Reduce Power Consumption
– Sleep State with Disabled Master Clock
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PWM Controller
– Two PWM Signals
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Real Time Clock (RTC)
– Time in GPS Format and 15-bit Fractional Part of a Second
– Programmable Interrupt
– Timer with a 8-bit Fractional Part of a Second and Parallel Load
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2.3V to 3.6V or 1.8V Supply Voltage
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Includes Power Supervisor
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Battery Backup Memory
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9 mm
×
9 mm 100-pin BGA Package
GPS Baseband
Processor
ATR0620
Summary
Preliminary
Rev. 4574CS–GPS–05/05