Rainbow Electronics DS1243Y User Manual

Page 12

DS1243Y

12 of 13

NOTES:

is high for a read cycle.

= V

or V

. If

= V

during write cycle, the output buffers remain in a high impedance state.

3. t

is specified as the logical AND of

and

. t

is measured from the latter of

going low to the earlier of

going high.

4. t

, t

are measured from the earlier of

going high.

5. These parameters are sampled with a 50 pF load and are not 100% tested.

6. If the

low transition occurs simultaneously with or later than the

low transition in Write

Cycle 1, the output buffers remain in a high impedance state during this period.

7. If the

high transition occurs prior to or simultaneously with the

high transition, the output

buffers remain in a high impedance state during this period.

8. If

is low or the

low transition occurs prior to or simultaneously with the

low transition,

the output buffers remain in a high impedance state during this period.

9. The expected t

is defined as cumulative time in the absence of V

with the clock oscillator

running.

10. t

is a function of the latter occurring edge of

11. t

and t

are a function of the first occurring edge of

12. RST (Pin1) has an internal pull–up resistor.
13. Real–Time Clock Modules can be successfully processed through conventional wave–soldering

techniques as long as temperature exposure to the lithium energy source contained within does not
exceed +85°C. Post-solder cleaning with water washing techniques is acceptable, provided that
ultrasonic vibration is not used.