Rainbow Electronics DS12С887A - Manual (Page 2)

DS12C887A
2 of 2
to clear the RAM, RCLR must be forced to an input logic 0 (-0.3V to +0.8V) during battery-backup mode
when V
CC
is not applied. The RCLR function is designed to be used via human interface (shorting to
ground manually or by switch) and not to be driven with external buffers.
For a complete description of operating conditions, electrical characteristics, bus timing and pin
descriptions other than
RCLR , see the DS12C887 data sheet.
DS12C887 REAL-TIME CLOCK PLUS RAM
PKG 24-PIN
DIM MIN MAX
A IN. 1.320 1.335
MM 33.53 33.91
B IN. 0.675 0.700
MM 17.15 17.78
C IN. 0.345 0.370
MM 8.76 9.40
D IN. 0.100 0.130
MM 2.54 3.30
E IN. 0.015 0.030
MM 0.38 0.76
F IN. 0.110 0.140
MM 2.79 3.56
G IN. 0.090 0.110
MM 2.29 2.79
H IN. 0.590 0.630
MM 14.99 16.00
J IN. 0.008 0.012
MM 0.20 0.30
K IN. 0.015 0.021
MM 0.38 0.53
.
Note: Pins 2, 3, 16, 20, and 22 are missing by design.
This device cannot be stored or shipped in conductive
material that will give a continuity path between the RAM
clear pin and ground.