Rainbow Electronics MAX5953D - Manual (Page 16)

MAX5953A/MAX5953B/MAX5953C/MAX5953D
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
16 ______________________________________________________________________________________
Power Mode
During power mode, when V IN rises above the undervolt-
age lockout threshold (V UVLO,ON ), the IC gradually turns
on the internal n-channel MOSFET Q1 (see Figure 8).
The IC charges the gate of Q1 with a constant current
source (10µA, typ). The drain-to-gate capacitance of Q1
limits the voltage rise rate at the drain of the MOSFET,
thereby limiting the inrush current. To further reduce the
inrush current, add external drain-to-gate capacitance
(see the Inrush Current Limit section). When the drain of
Q1 is within 1.2V of its source voltage and its gate-to-
source voltage is above 5V, the MAX5953A/MAX5953B
assert the PGOOD output (MAX5953C/MAX5953D assert
the PGOOD output). The IC has a wide UVLO hysteresis
and turn-off deglitch time to compensate for the high
impedance of the twisted-pair cable.
Undervoltage Lockout for PD Interface
The IC operates up to a 67V supply voltage with a default
UVLO turn-on (V
UVLO,ON ) set at 38.6V (MAX5953A/
MAX5953C) or 35.4V (MAX5953B/MAX5953D) and a
UVLO turn-off (V
UVLO,OFF ) set at 30V. The MAX5953A/
MAX5953C have an adjustable UVLO threshold using a
resistor-divider connected to UVLO (see Figure 3). When
the input voltage goes below the UVLO threshold for
more than t
OFF_DLY , the MOSFET turns off.
To adjust the UVLO threshold, connect an external
resistor-divider from V+ to UVLO to V
EE . Use the follow-
ing equations to calculate R1 and R2 for a desired
UVLO threshold:
where V IN,EX is the desired UVLO threshold. Since the
resistor-divider replaces the 25.5k Ω PD detection resis-
tor, ensure that the sum of R1 and R2 equals 25.5k
Ω
±1%. When using the external resistor-divider, MAX5953A/
MAX5953C have an external reference voltage hysteresis
of 20% (typ). In other words, when UVLO is programmed
externally, the turn-off threshold is 80% (typ) of the new
UVLO threshold.
Inrush Current Limit
The IC charges the gate of the internal MOSFET with a
constant current source (10µA, typ). The drain-to-gate
capacitance of the MOSFET limits the voltage rise rate
at the drain, thereby limiting the inrush current. Add an
external capacitor from GATE to OUT to further reduce
the inrush current. Use the following equation to calcu-
late the inrush current:
The recommended typical inrush current for a PoE
application is 100mA.
PGOOD/
PGOOD
Output
PGOOD is an open-drain, active-high logic output.
PGOOD goes high impedance when V
OUT is within
1.2V of V EE and when GATE is 5V above V EE .
Otherwise, PGOOD is pulled to V
OUT
(given that V
OUT
is at least 5V below V+). Connect PGOOD directly to
CSS to enable/disable the DC-DC converter. PGOOD is
an open-drain, active-low logic output. PGOOD is
pulled to V
EE when V OUT is within 1.2V of V EE and
when GATE is 5V above V EE . Otherwise, PGOOD goes
high impedance. Connect a 100k Ω pullup resistor from
PGOOD to V+ if needed.
Thermal Dissipation
Thermal shutdown limits total power dissipation in the
IC. If the junction temperature exceeds +160°C, ther-
mal shutdown is enabled to turn off the MAX5953A/
MAX5953B/MAX5953C/MAX5953D, allowing the IC to
cool. The IC turns on after the junction temperature
cools by 20°C.
DC-DC Converter
The MAX5953A/MAX5953B/MAX5953C/MAX5953D iso-
lated PWM power ICs feature integrated switching power
MOSFETs connected in a voltage-clamped, two-transis-
tor, power-circuit configuration. These devices can be
used in both forward and flyback configurations with a
wide 11V to 76V input voltage range. The voltage-
clamped power topology enables full recovery of stored
magnetizing and leakage inductive energy for enhanced
efficiency and reliability. A look-ahead signal for driving
secondary-side synchronous rectifiers can be used to
increase efficiency. A wide array of protection features
include UVLO, overtemperature shutdown, and short-cir-
cuit protection with hiccup current-limit for enhanced
performance and reliability. Operation up to 500kHz
allows smaller external magnetics and capacitors.
Power Topology
The two-switch forward-converter topology offers out-
standing robustness against faults and transformer sat-
uration while affording efficient use of 0.4
Ω power
MOSFETs. Voltage-mode control with feed-forward
compensation allows the rejection of input supply dis-
turbances within a single cycle similar to that of current-
mode controlled topologies.
I I
C
C
INRUSH G
OUT
GATE
= ×
R k
V
V
R k R
REF UVLO
IN EX
2 25 5
1 25 5 2
= ×
=
−
.
.
,
,
Ω
Ω