Rainbow Electronics MAX5101 - Manual (Page 3)

MAX5101
+2.7V to +5.5V, Low-Power, Triple, Parallel
8-Bit DAC with Rail-to-Rail Voltage Outputs
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ELECTRICAL CHARACTERISTICS (continued)
(V DD = +2.7V to +5.5V, R L = 10k Ω, C
L = 100pF, T A = T MIN to T MAX , unless otherwise noted. Typical values are at V DD = +3V and
T A = +25°C.)
Note 1: Reduced digital code range (code 00 hex to code F0 hex) due to swing limitations when the output amplifier is loaded.
Note 2: Gain error is: [100 (V
F0,meas - ZCE - V F0,ideal ) / V DD ]. Where V F0,meas is the DAC output voltage with input code F0 hex, and
V F0,ideal is the ideal DAC output voltage with input code F0 hex (i.e., V DD · 240 / 256).
Note 3: Output settling time is measured from the 50% point of the falling edge of WR to ±1/2LSB of V OUT ’s final value.
Note 4: Channel-to-Channel Isolation is defined as the glitch energy at a DAC output in response to a full-scale step change on any
other DAC output. The measured channel has a fixed code of 80 hex.
Note 5: Digital Feedthrough is defined as the glitch energy at any DAC output in response to a full-scale step change on all eight
data inputs with WR at V DD .
Note 6: R L = ∞ , digital inputs at GND or V
DD .
Note 7: Timing measurement reference level is (V IH + V IL ) / 2.
CONDITIONS UNITS MIN TYP MAX SYMBOL PARAMETER
Digital-to-Analog Glitch Impulse Code 80 hex to code 7F hex 90 nVs
Wideband Amplifier Noise 60 µV RMS
Shutdown Recovery Time t SDR To ±1/2LSB of final value of V OUT 13 µs
Time to Shutdown t SDN I DD < 5µA 20 µs
Power-Supply Voltage V DD 2.7 5.5 V
Supply Current (Note 6) I DD 280 520 µA
Shutdown Current 1 3 µA
Address to WR Setup t AS 5 ns
Address to WR Hold t AH 0 ns
Data to WR Setup t DS 25 ns
WR Pulse Width t WR 20 ns
Data to WR Hold t DH 0 ns
POWER SUPPLIES
DIGITAL TIMING (Figure 1) (Note 7)