Rainbow Electronics MAX8621Z - Manual (Page 9)

MAX8621Y/MAX8621Z
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
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Pin Description
PIN NAME FUNCTION
1 FB1 Voltage Feedback for Step-Down Converter 1. FB1 regulates to 0.6V nominal.
2 FB2 Voltage Feedback for Step-Down Converter 2. FB2 regulates to 0.6V nominal.
3 GND Ground. Ground for all LDOs and the control section.
4 REFBP
Reference Noise Bypass. Connect a 0.01µF ceramic capacitor from REFBP to GND. Not intended to drive resistive
load. REFBP is high impedance in shutdown.
5 EN4 Enable Input for OUT4. Drive EN4 high to turn on OUT4.
6 OUT4
150mA LDO4 output. Bypass OUT4 to GND with a 2.2µF ceramic capacitor. OUT4 is high impedance when
disabled. OUT4 can only be activated if OUT1 is within 87% of regulation.
7 EN3 Enable Input for OUT3. Drive EN3 high to turn on OUT3.
8 EN2
Enable Input for OUT2. Drive EN2 high to disable OUT2. Drive EN2 low or leave open to enable OUT2. EN2 is
internally pulled to GND by an 800k
Ω (typ) pulldown resistor. If the MAX8621Y/MAX8621Z are placed into shutdown
using PWRON (PWRON = low), OUT2 does not power regardless of the status of EN2.
9 OUT2
300mA LDO2 Output. Bypass with a 4.7µF ceramic capacitor to GND. OUT2 is high impedance when disabled.
OUT2 can only be activated if OUT1 is within 87% of regulation.
10 IN2
Supply Voltage to the Output MOSFET of All 4 LDOs. IN2 must be shorted to IN1 and IN3. Connect a 4.7µF ceramic
capacitor from IN2 to GND.
11 RESET
Open-Drain, Active-Low Reset Output. RESET asserts low when V OUT1 drops below 87% (typ) of regulation. RESET
deasserts 60ms after V OUT1 rises above 87% (typ) of regulation (Figure 2).
12 OUT1 300m A LD O1 O utp ut. Byp ass w i th a 4.7µF cer am i c cap aci tor to G N D . OU T1 i s hi g h i m p ed ance w hen d i sab l ed .
13 OUT3
150mA LDO3 Output. Bypass OUT3 to GND with a 2.2µF ceramic capacitor. OUT3 is high impedance when
disabled. OUT3 can only be activated if OUT1 is within 87% of regulation.
14 PWRON
Power Enable Input. Drive PWRON high to enable the MAX8621Y/MAX8621Z. Drive PWRON low to enter shutdown
mode. PWRON has an internal 800k
Ω (typ) pulldown resistor.
15 ENDR
Enable Input for DR. Drive ENDR low for DR to go into high impedance. Drive ENDR high to activate DR, pulling
DR low.
16 IN3
Supply Voltage to the Control Section. IN3 must be shorted to IN1 and IN2. Connect a 4.7µF ceramic capacitor from
IN3 to GND.
17 SEL2
LDO Output-Voltage Select Input 2. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine
combinations (Table 1).
18 SEL1
LDO Output-Voltage Select Input 1. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine
combinations (Table 1).
19 DR
200mA Driver Output. Connects to the open drain of an internal n-channel MOSFET whose gate is controlled by
ENDR.
20 PGND2 Power Ground for BUCK2 and DR Switch
21 LX2
Inductor Connection for BUCK2. LX2 is internally connected to the drain of the internal p-channel MOSFET and the
drain of the internal n-channel synchronous rectifier for BUCK2. LX2 is high impedance when BUCK2 is disabled.
22 IN1
Supply Voltage to the Output Stage of BUCK1 and BUCK2. IN1 must be shorted to IN2 and IN3. Connect a 10µF
ceramic capacitor from IN1 to GND.
23 LX1
Inductor Connection for BUCK1. LX1 is internally connected to the drain of the internal p-channel MOSFET and the
drain of the internal n-channel synchronous rectifier for BUCK1. LX1 is high impedance when BUCK1 is disabled.
24 PGND1 Power Ground for BUCK1
— EP Exposed Paddle. Connect the exposed paddle to GND, PGND1, and PGND2.