Rainbow Electronics MAX5079 User Manual
Page 13
MAX5079
ORing MOSFET Controller with
Ultra-Fast 200ns Turn-Off
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13
V
IN
= 5V or V
IN
= 12V. For V
IN
≤ 8V, the gate drive is 5V
above V
IN
and for V
IN
> 8V, the gate drive is 7V above
V
IN
. Lower gate drive means faster turn-off during faults,
while higher gatedrive means lower R
DSON
.
A fast and slow comparator monitor the voltage from IN
to BUS. When this voltage crosses the negative fast- or
slow-comparator threshold voltage for the blanking time
duration, GATE is pulled low by an internal 2A current
sink. Both comparators have an adjustable threshold
voltage. GATE is pulled low if any of the following con-
ditions are met.
1) V
UVLO
< 0.6V.
2) V
AUXIN
< 2.25V and V
IN
< 2.25V.
3) V
OVI
≥ 0.6V.
4) V
IN
≤ (V
BUS
- V
FTH
) or V
IN
≤ (V
BUS
- V
STH
) and
(V
GATE
- V
IN
)
≥ 1.8V.
When the above conditions are not true and V
IN
≤
V
BUS
, GATE is shorted to IN. To insure that the external
MOSFET is quickly turned off, given the above condi-
tions, the GATE pulldown circuitry is powered by either
V
IN
, V
AUXIN
, or V
BUS
as long as any one is greater
then 2.75V.
Fast Comparator (FTH)
The fast comparator has a 50ns blanking time to avoid
unintentional turn-off of the ORing MOSFET during fast
transients. Additionally, the fast-comparator reverse
voltage threshold (V
FTH
) is programmable to suit the
need of an individual application. Higher V
FTH
thresh-
old allows for a larger glitch at BUS during a fault, but
improves the noise immunity. Lower V
FTH
reduces
glitches at BUS during a fault, however, with lower V
FTH
spikes at BUS or glitches at IN can be read as faults,
unintentionally turning off the ORing MOSFET. Program
V
FTH
by connecting a resistor from FTH to GND. Adjust
V
FTH
to optimize the system performance using the fol-
lowing equation:
V
FTH
can be chosen from 24mV to 400mV. Connect
FTH to GND to choose the default 24mV threshold.
Slow Comparator (STH)
The MAX5079 includes a slow comparator to provide
glitch immunity during the hot insertion or removal of
paralleled power supplies. During the hot insertion,
BUS can see voltage spikes. These spikes can be
interpreted as a reverse voltage across the ORing
MOSFET. The amplitude of the spikes is proportional to
the load step seen by the parallel power supply while
the duration of the spikes depends on the loop
response of the load share and PWM controller.
The slow comparator has a programmable reverse volt-
age threshold (V
STH
) as well as a programmable blank-
ing time (t
STH
). An internal transconductance amplifier
converts the IN to BUS differential voltage to a current
and applies it to a parallel combination of resistor and
capacitor (R
STH
and C
STH
) from STH to GND. The
reverse threshold voltage (V
STH
) for the slow compara-
tor is adjusted through R
STH
. Use the following equa-
tion to calculate the R
STH
for a required V
STH
.
where G
M_STH
= 0.17mS.
The internal 500k
Ω resistance from the output of the
transconductance to GND can change the actual V
STH
if R
STH
is above 50k
Ω. In this case, see the Typical
Operating Circuit to select R
STH
. Once R
STH
is chosen,
the blanking time can be adjusted by C
STH
. The delay
time is:
where t
SBL
= 0.9ms and is the default blanking time
generated by an internal digital delay. Leaving STH
floating results in a 12mV threshold voltage and a 0.9ms
blanking time. V
OD
(overdrive) is the difference between
actual reverse voltage (V
BUS
- V
IN
) and V
STH
threshold.
Overvoltage Protection Latch (OVI/OVP)
OVI is the negative input to the overvoltage compara-
tor. The positive input of this comparator is connected
to the internal 0.6V reference and an open-drain output
is provided at OVP. The overvoltage sensing for over-
voltage protection is done at either IN or BUS. OVP
t
R
C
V
V
V
t
DELAY
STH
STH
STH
STH
DD
SBL
=
Ч
Ч −
−
+
+
ln 1
R
V
V
mV x G
STH
STH
M STH
=
(
)
−
1
12
_
R
V
mV
A
FTH
FTH
=
−
24
6 67
.
µ