Rainbow Electronics MAX5079 - Manual (Page 10)

MAX5079
ORing MOSFET Controller with
Ultra-Fast 200ns Turn-Off
10 ______________________________________________________________________________________
Detailed Description
The MAX5079 ORing MOSFET controller drives an
external n-channel MOSFET and replaces ORing
diodes in high-reliability redundant power-management
systems or multiple paralleled power supplies. The
device has an internal charge pump to drive the high-
side n-channel ORing MOSFET. Additional features
include an adjustable undervoltage lockout threshold
(UVLO), output overvoltage detector (OVI/OVP), input
power-good detector (PGOOD), and two programma-
ble reverse voltage detectors to detect both fast and
slow rises in the reverse voltage across the ORing
MOSFET. The input power-supply range is from 2.75V
to 13.2V or down to 1V when an auxiliary supply of at
least 2.75V is available.
Operational Description
This section describes a detailed startup sequence and
behavior of the MAX5079 under different conditions of
V
BUS and V IN . The MAX5079 powers up whenever V IN
is equal to or greater than 2.75V and V UVLO exceeds
the UVLO threshold of 0.66V. Operation with V IN down
to 1V is possible as long as V
UVLO
≥ 0.6V and V
AUXIN
≥
2.75V.
When V UVLO crosses the UVLO threshold, V GATE rises
to V IN and the charge pump turns on. The charge
pump delivers 2mA to charge the gate capacitance of
the external MOSFET connected to GATE. The constant
gate-charge current prevents large inrush currents from
the input supply. During turn-on, the MAX5079 will
ignore the reverse voltage at IN with respect to BUS.
This is necessary to avoid the unintentional turn-off of
the ORing MOSFET as the momentary inrush current
causes V
IN to dip.
Figure 2 shows the MAX5079 in an ORing configuration
with three parallel power supplies (PS1, PS2, and PS3)
and three MAX5079s (U1, U2, and U3) provided by out-
puts V
OUT1 , V OUT2 , and V OUT3 . The following events
must be carefully considered to ensure proper function-
ality of the MAX5079 ICs.
1) V
BUS
is zero with a discharged capacitor (C
BUS
).
All three power supplies are turned ON simulta-
neously. V
OUT1 comes up before V OUT2 and
V OUT3 .
a. When V
OUT1
turns on, the bus capacitors (C
BUS
)
begin charging from V OUT1 through N1’s body
diode. When V UVLO (U1) rises above the UVLO
threshold, the MAX5079 (U1) charge pump turns
on, and U1 monitors the positive potential from
V
OUT1
to V
BUS
. When V
OUT1
≥ V
BUS
the charge
pump brings GATE (U1) to 5.5V above V
IN
(U1) (or
7.5V above V IN depending on the magnitude of
V IN ), by sourcing 2mA into N1’s gate capacitance.
This results in a less than 10µs turn-on time for the
FDB7045L used in the MAX5079 evaluation kit. The
fast turn-on is needed to assure that N1 is ON
before the rising V
OUT1
reaches its steady-state
value. If the MOSFET is not turned on before V OUT1
reaches its steady state, V BUS may overshoot due
to the shorting of the 0.7V (forward drop) of N1’s
body diode. A higher V
IN (U1) can more quickly
charge the charge-pump capacitor to 5V (or 7V),
while a lower V
IN
(U1) will take longer. Typically the
MOSFET turns on at V GS = 2.5V. Ensure that the
soft-start time of the power supply is large enough
(> 5ms) to avoid V
OUT1 racing ahead and causing
V BUS to overshoot. Care must be taken to avoid the
overloading of V OUT1 by either limiting the source
current (using the current-sharing circuit) or delay
the loading of the BUS until all three power supplies
are up and running.
b. V OUT2 turns on and begins increasing the voltage
at IN (U2). V
UVLO
(U2) crosses the UVLO thresh-
old, the MAX5079 (U2) charge pump turns on and
U2 monitors the V
OUT2 to V BUS voltage. When this
voltage difference becomes positive, GATE (U2)
begins sourcing 2mA into N2’s gate capacitance.
During turn-on, the reverse voltage turn-off circuit
is momentarily disabled. If V
OUT2
is lower than
V OUT1 , the external load-sharing controller circuit
of PS2 will try to increase V OUT2 to source current
from V OUT2 . Assume V OUT2 ’s rise time is slow
enough not to cause any overshoot before N2
turns on and starts sharing the current.
c. V OUT3 turns on and U3 follows the same sequence
as U2. Eventually V OUT1 , V OUT2 , and V OUT3 reach
to equilibrium and sharing equal currents.
2) PS1 and PS2 are on and sharing the load when
PS3 is hot-inserted. PS3 will take the same
course as discussed in 1b above.
a. If V OUT3 is higher than V BUS , the BUS voltage will
increase to the new level determined by V OUT3 .
The external load-sharing controller circuit of PS1
and PS2 will increase V
OUT1 and V OUT2 to force
current sharing.
b. If V OUT3 is lower than V BUS , the load-sharing cir-
cuit of PS3 will increase V OUT3 to force the sharing
of current. This causes V OUT3 to increases above
V
BUS
. When this voltage difference becomes posi-
tive, GATE (U3) begins sourcing 2mA into N3’s
gate capacitance. Again, the reverse voltage turn-
off circuit is disabled momentarily, as discussed
before. The load-sharing circuit of PS3’s controller
will adjust V
OUT3 so as to share the load current.