Rainbow Electronics MAX5139 - Manual (Page 9)

Detailed Description
The MAX5138/MAX5139 are a family of single-channel,
pin-compatible and software-compatible, 16-bit and 12-
bit DACs. The parts are low-power, buffered voltage-
output, high-linearity DACs. The MAX5138/MAX5139
minimize the digital noise feedthrough from input to out-
put by powering down the SCLK and DIN input buffers
after completion of each 24-bit serial input. On power-
up, the MAX5138/MAX5139 reset the DAC output to zero
or midscale, depending on the state of the M/Z input,
providing additional safety for applications that drive
valves or other transducers that need to be off on power-
up. The MAX5138/MAX5139 contain a segmented resis-
tor string-type DAC, a serial-in parallel-out shift register,
a DAC register, power-on reset (POR) circuit, and con-
trol logic. On the falling edge of the clock (SCLK) pulse,
the serial input (DIN) data is shifted into the device, MSB
first. During power-down, an internal 80kΩ resistor pulls
DAC outputs to AGND.
Output Amplifier (OUT)
The MAX5138/MAX5139 include an internal buffer for the
DAC output. The internal buffer provides improved load
regulation and transition glitch suppression for the DAC
output. The output buffer slews at 1.25V/µs and drives up
to 2kΩ in parallel with 200pF. The analog supply voltage
(AVDD) determines the maximum output voltage range
of the device as AVDD powers the output buffer.
DAC Reference
Internal Reference
The MAX5138/MAX5139 feature an internal reference
with a nominal +2.44V output. Connect REFO to REFI
when using the internal reference. Bypass REFO to
AGND with a 47pF (maximum 100pF) capacitor.
Alternatively, if heavier decoupling is required, add a
1kΩ resistor in series with a 1µF capacitor in parallel
with the existing 100pF capacitor. REFO can deliver up
to 100µA of current with no degradation in perfor-
mance. Configure other reference voltages by applying
a resistive potential divider with a total resistance
greater than 33kΩ from REFO to AGND.
MAX5138/MAX5139
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
_______________________________________________________________________________________ 9
Pin Description
PIN NAME FUNCTION
1, 4, 9 N.C. No Connection. Not internally connected.
2 M/Z
Power-Up Reset Select. Connect M/Z low to AGND to power up the DAC output. Connect M/Z
high to power up the DAC output to midscale.
3 LDAC Load DAC. Active-low hardware load DAC input.
5 SCLK Serial-Clock Input
6 CS Active-Low Chip-Select Input
7 DIN Data In
8 AGND Analog Ground. Internally connected to AGND. Connect AGND to AGND externally.
10 READY Data Output
11 DVDD Digital Power Supply. Bypass DVDD with a 0.1µF capacitor to AGND.
12 OUT Buffered DAC Output
13 AVDD Analog Power Supply. Bypass AVDD with a 0.1µF capacitor to AGND.
14 REFI Reference Voltage Input. Bypass REFI with a 0.1µF capacitor to AGND.
15 REFO Reference Voltage Output
16 AGND DAC Ground. Internally connected to AGND. Connect AGND to AGND externally.
— EP
Exposed Pad. Not internally connected. Connect to a ground or leave unconnected. Not intended
as an electrical connection point.