Rainbow Electronics MAX15041 - Manual (Page 14)

MAX15041
Low-Cost, 3A, 4.5V to 28V Input, 350kHz, PWM
Step-Down DC-DC Regulator with Internal Switches
14 ______________________________________________________________________________________
For R LOAD much greater than ESR, the equation can be
further simplified as follows:
where V FB is equal to 0.606V.
3) Select C C . C C is determined by selecting the
desired first system zero, f Z1 , based on the desired
phase margin. Typically, setting f Z1 below 1/5th of
f CO provides sufficient phase margin.
therefore:
4) If the ESR output zero is located at less than one-half
the switching frequency use the (optional) sec-
ondary compensation capacitor, C
CC , to cancel it,
as follows:
therefore:
If the ESR zero exceeds 1/2 the switching frequency,
use the following equation:
therefore:
The downside of C CC is that it detracts from the overall
system phase margin. Care should be taken to guarantee
this third-pole placement is well beyond the desired
crossover frequency, minimizing its interaction with the
system loop response at crossover. If C
CC is smaller than
10pF, it can be neglected in these calculations.
Setting the Soft-Start Time
The soft-start feature ramps up the output voltage slow-
ly, reducing input inrush current during startup. Size the
C
SS capacitor to achieve the desired soft-start time t SS
using:
I SS , the soft-start current, is 5µA (typ) and V FB , the out-
put feedback voltage threshold, is 0.606V (typ). When
using large C
OUT
capacitance values, the high-side
current limit may trigger during the soft-start period. To
ensure the correct soft-start time, t
SS , choose C SS large
enough to satisfy:
I HSCL_MIN is the minimum high-side switch, current-
limit value.
Power Dissipation
The MAX15041 is available in a thermally enhanced
TQFN package and can dissipate up to 1.666W at T
A =
+70°C. The exposed pad should be connected to
SGND externally, preferably soldered to a large ground
plane to maximize thermal performance. When the die
temperature exceeds +155°C, The thermal-shutdown
protection is activated (see the
Thermal-Shutdown
Protection section).
Layout Procedure
Careful PCB layout is critical to achieve clean and sta-
ble operation. It is highly recommended to duplicate
the MAX15041 evaluation kit layout for optimum perfor-
mance. If deviation is necessary, follow these guide-
lines for good PCB layout:
1) Connect input and output capacitors to the power
ground plane; connect all other capacitors to the
signal ground plane.
C C
V I
I I V
SS OUT
OUT SS
HSCL MIN OUT FB
>> Ч
Ч
− Ч
( )
_
C
I t
V
SS
SS SS
FB
=
×
C
f R
CC
SW C
=
Ч Ч
2
2 π
f
C R
f
P
CC C
SW
3
1
2 2
=
×
=
π
C
C ESR
R
CC
OUT
C
=
×
1
2
1
2
3 2 π π Ч
= = =
Ч C R
f f
C ESR
CC C
P Z
OUT
C
f R
C
CO C
≥
Ч Ч
5
2 π
f
C R
f
Z
C C
CO
1
1
2 5
=
×
≤
π
R
V
V
f C
g G
C
OUT
FB
CO OUT
MV MOD
= Ч
Ч Ч
Ч
2
π